[U-Boot-Users] possible problem in u-boot-0.2.0/cpu/mpc8xx/cpu_init.c

[Reinhard Meyer]

No, that is why we change it afterwards.

The Processor starts with 32kHz*512,
then EBDF is set (external clock down to 8MHz, does not affect reading the
FLASH)
then the PLL MF is set for the desired Core Clock (in our other Ports for
OS-9, Metrowerks, EMKstax)

I cannot find any reference in the 860UM that forbids changing the EBDF from
the initial HRCW setting...

> In message <00eb01c2ccf7$3b7bc230$6d4ba8c0 at alb.sub.de> you wrote:
> >
> > I am just porting u-boot to our TOP860 module, which uses 50MHz/80Mhz
> > core clock and 25MHz/40MHz Bus Clock (EBDF=1).
>
> Is your HRCW set that way, too?
>
> > I noticed that in cpu_init.c/line 77ff the PLPRCR is written before SCCR
> > which will cause the CLKOUT to ramp up to 50 MHz before it is being
> > reduced to half the frequency. That might violate alot of timings. It
> > does not appear to cause any problems right now; but I would suggest
> > anyway to change the order there.
>
> You are not supposed to change the EBDF setting. The code reads:
>
>     ...
>      90
>      91         /* System integration timers. Don't change EBDF! (15-27)
*/
>      92
>     ...