[U-Boot-Users] RE: cfi flash problem

Shlomo_Kut at mksinst.com Shlomo_Kut at mksinst.com
Thu Feb 12 12:08:12 CET 2004 

Hi Brad,

The CFI flash support for different bus widths is very important to us as 
we produce boards with various bus widths. Do you know if LINUX can be 
configured to automatically configure itself to to system bus width?

What are the AMD issues you referred to in your last post?

We intend our next board to use AMD 16 bit LV128M abd LV256M mirror flash 
parts with both 16 bit and 32 bit wide busses. I will let you know how it 
runs on these boards when they arrive.

The latest patch running on my 
CPU: MPC850
FLASH :AMD L320DB * 4
Chip width: 8
Port Width: 32

Total flash size 16Mb.

The latest patch runs better. It gets the flash size correct but still 
prints out a bus width of 64 bits in flash info. I fails to write the 
environment to flash. 

I have defined CFG_FLASH_PROTECTION. I shall try running again with this 
option disabled. 

Here is its output with DEBUG enabled.

U-Boot 1.0.0 (Feb 12 2004 - 11:14:27)

CPU:   XPC850xxZTB at 48 MHz: 2 kB I-Cache 1 kB D-Cache
Board QUANTUM, Serial No: 12345
DRAM:  32 MB
FLASH: erase_region_count = 8 erase_region_size = 8192
erase_region_count = 63 erase_region_size = 65536
16 MB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   SCC ETHERNET

Enter password - autoboot in 5 sec...
=> fli

Bank # 1: CFI conformant FLASH (64 x 8)  Size: 16 MB in 71 Sectors
 EraU-Boot 1.0.0 (Feb 12 2004 - 11:14:27)

CPU:   XPC850xxZTB at 48 MHz: 2 kB I-Cache 1 kB D-Cache
Board QUANTUM, Serial No: 12345
DRAM:  32 MB
FLASH: erase_region_count = 8 erase_region_size = 8192
erase_region_count = 63 erase_region_size = 65536
16 MB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   SCC ETHERNET

Enter password - autoboot in 5 sec...
=> fli

Bank # 1: CFI conformant FLASH (64 x 8)  Size: 16 MB in 71 Sectors
 Erase timeout 16384 ms, write timeout 0 ms, buffer write timeout 1 ms, 
buffer size 1
  Sector Start Addresses:
    FF000000        FF008000        FF010000        FF018000 FF020000
    FF028000        FF030000        FF038000        FF040000 FF080000
    FF0C0000        FF100000        FF140000        FF180000 FF1C0000
    FF200000        FF240000        FF280000        FF2C0000 FF300000
    FF340000        FF380000        FF3C0000        FF400000 FF440000
    FF480000        FF4C0000        FF500000        FF540000 FF580000
    FF5C0000        FF600000        FF640000        FF680000 FF6C0000
    FF700000        FF740000        FF780000        FF7C0000 FF800000
    FF840000        FF880000        FF8C0000        FF900000 FF940000
    FF980000        FF9C0000        FFA00000        FFA40000 FFA80000
    FFAC0000        FFB00000        FFB40000        FFB80000 FFBC0000
    FFC00000        FFC40000        FFC80000        FFCC0000 FFD00000
    FFD40000        FFD80000        FFDC0000        FFE00000 FFE40000
    FFE80000        FFEC0000        FFF00000 (RO) FFF40000 FFF80000
    FFFC0000
=> saveenv
Saving Environment to Flash...
.
Un-Protected 1 sectors
.
Un-Protected 1 sectors
Erasing Flash...
. done
Erased 1 sectors
Writing to Flash... Timeout writing to Flash
.
Protected 1 sectors
.
Protected 1 sectors

Keep up the good work.

Shlomo Kut

Software Engineer
MKS Instruments
Tenta Products
Tel: 972-8-9181015
Fax: 972-8-9181020
www.mksinst.com





"Brad Kemp" <Brad.Kemp at Seranoa.com>
02/11/2004 06:29 AM

 
        To:        <Shlomo_Kut at mksinst.com>, <u-boot-users at lists.sourceforge.net>
        cc: 
        Subject:        RE: cfi flash problem


Shlomo,
Did you apply the patch that I sent out a few days ago?
It fixes a problem with x8/x16 size detection.
Brad

-----Original Message-----
From: Shlomo_Kut at mksinst.com [mailto:Shlomo_Kut at mksinst.com] 
Sent: Wednesday, February 11, 2004 9:22 AM
To: u-boot-users at lists.sourceforge.net
Cc: Brad Kemp
Subject: cfi flash problem


Hi, 

I am having a problem with cfi_flash.c on my board.

CPU: MPC850
FLASH :AMD L320DB * 4
Chip width: 8
Port Width: 32

Total flash size 16Mb.

It incorrectly reports the flash size as being 32Mb instead of 16Mb.
This 
is because it incorrectly identifies the port width as being 64 bit 
instead of 32 bit.

When I start U-BOOT and run fli I get the following:

U-Boot 1.0.0 (Feb 11 2004 - 11:21:31)

CPU: XPC850xxZTB at 48 MHz: 2 kB I-Cache 1 kB D-Cache
Board QUANTUM, MKS U-BOOT VERSION 1.10, Serial No: 12345 Watchdog
enabled
DRAM: 32 MB
FLASH: flash detect cfi
32 MB
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Net: SCC ETHERNET

Enter password - autoboot in 5 sec...
=> fli

Bank # 1: CFI conformant FLASH (64 x 8) Size: 32 MB in 71 Sectors Erase
timeout 16384 ms, write timeout 0 ms, buffer write timeout 1 ms, 
buffer size 1
Sector Start Addresses:
FF000000 FF010000 FF020000 FF030000 FF040000
FF050000 FF060000 FF070000 FF080000 FF100000
FF180000 FF200000 FF280000 FF300000 FF380000
FF400000 FF480000 FF500000 FF580000 FF600000
FF680000 FF700000 FF780000 FF800000 FF880000
FF900000 FF980000 FFA00000 FFA80000 FFB00000
FFB80000 FFC00000 FFC80000 FFD00000 FFD80000
FFE00000 FFE80000 FFF00000 FFF80000 00000000
00080000 00100000 00180000 00200000 00280000
00300000 00380000 00400000 00480000 00500000
00580000 00600000 00680000 00700000 00780000
00800000 00880000 00900000 00980000 00A00000
00A80000 00B00000 00B80000 00C00000 00C80000
00D00000 00D80000 00E00000 00E80000 00F00000
00F80000
Maybe the message "flash detect cfi" should be written in a debug()?
When I compile with the DEBUG option set I see the following:

CPU:   XPC850xxZTB at 48 MHz: 2 kB I-Cache 1 kB D-Cache 
Board QUANTUM, Serial No: 12345it>(Ljava/lang/String;)V/server
      Watchdog enabledRx transfer timeout 
DRAM:  32 MB 
FLASH: flash detect cfi 
fwc addr ff000000 cmd ff ff 8bit x 8 
biteption.<init>(Ljava/lang/String;)VValue(
fwc addr ff000055 cmd 98 98 8bit x 8 bit 
is= cmd 51(Q) addr ff000010 is= ff 51xcept 
  java/io/F
fwc addr ff000000 cmd ff ffff 16bit x 8 bit
  vib/utils/Timer.run()V  java/la 
fwc addr ff000000 cmd ff 00ff 16bit x 16 bit 
cpm_spi_io: Tx/Rx transfer 
fwc addr ff0000aa cmd 98 0098 16bit x 16 bit 
is= cmd 51(Q) addr ff000020 is= ffff 0051ror during writeers/Simp 
fwc addr ff000000 cmd ff ffffffff 32bit x 8 bittputStream.wr 
is= cmd 51(Q) addr ff000040 is= ff00ff00 00510051
fwc addr ff000000 cmd ff 000000ff 32bit x 32 bit
fwc addr ff000154 cmd 98 00000098 32bit x 32 bit
is= cmd 51(Q) addr ff000040 is= ffffff00 00000051
fwc addr ff000000 cmd ff ffffffffffffffff 64 bit x 8 bit
fwc addr ff0002a8 cmd 98 9898989898989898 64 bit x 8 bit
is= cmd 51(Q) addr ff000080 is= 5151515151515151 5151515151515151 is=
cmd 52(R) addr ff000088 is= 5252525252525252 5252525252525252 is= cmd
59(Y) addr ff000090 is= 5959595959595959 5959595959595959 found port 8
chip 1 port 64 bits chip 8 bits manufacturer is 2 size_ration 8 port 64
bits chip 8 bits found 2 erase regions fwc addr ff000000 cmd ff
ffffffffffffffff 64 bit x 8 bit 32 MB Can anybody out there help? Could
these random characters be comming fom the watchdog?



regards

Shlomo Kut

Software Engineer
MKS Instruments
Tenta Products
Tel: 972-8-9181015
Fax: 972-8-9181020
www.mksinst.com

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