[U-Boot-Users] [PATCH 05/08]: mpc7448hpc2 board flash support

[Zang Roy-r61911]

> > 
> > mpc7448 processor is BIG ENDIAN, while the tsi108 bridge 
> connects the 
> > flash chip by little ENDIAN mode.  When I set __LITTLE_ENDIAN in the

> > cfi_flash driver, everything seems OK, but  the written bytes are 
> > swapped (see the following log).
> > Now, It seems that if I define CFG_FLASH_USE_BUFFER_WRITE 
> in my config 
> > file, this issue can be solved. I will do more test on my board.
> > While, how can I set __LITTLE_ENDIAN mode for cfi_driver 
> file in a BIG 
> > ENDIAN system?
> 
> Please check your keyboard; the 'N' key seems to fail quite often.

Sorry, I have changed my keyboard:).

> 
> > FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
> > 16 MB
> ...
> > => fli
> > 
> > Bank # 1: CFI conformant FLASH (32 x 16)  Size: 16 MB in 
> 128 Sectors  
> > Erase timeout 16384 ms, write timeout 1 ms, buffer write 
> timeout 5 ms, 
> > buffer size 32
> 
> Stop. What's this. First we see a report of "Unknown  FLASH  
> on  Bank 1",  and  that  the size has been set to 0, and here 
> we get different information?

That first "Bank1 " is not this "Bank #1".  this "BANK #1"  should refer
the Bank index 0. 
It might be a bug in u-boot. Please compare the following code in
u-boot.

in file cfi_flash.c :
unsigned long flash_init (void)
{
...
	/* Init: no FLASHes known */
	for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
		flash_info[i].flash_id = FLASH_UNKNOWN;
		size += flash_info[i].size = flash_get_size
(bank_base[i], i);
		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
#ifndef CFG_FLASH_QUIET_TEST
			printf ("## Unknown FLASH on Bank %d - Size =
0x%08lx = %ld MB\n",
				i, flash_info[i].size,
flash_info[i].size << 20);
#endif /* CFG_FLASH_QUIET_TEST */
 ...
The index start from 0.

in file cmd_flash.c
int do_flinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
...
	if (argc == 1) {	/* print info for all FLASH banks */
		for (bank=0; bank <CFG_MAX_FLASH_BANKS; ++bank) {
			printf ("\nBank # %ld: ", bank+1);

			flash_print_info (&flash_info[bank]);
		}
		return 0;
	}
...
the print information start from bank+1.

Should they be unified?

> 
> >   Sector Start Addresses:
> >     FF000000      FF020000      FF040000      FF060000      FF080000
> ...
> >     FFFA0000      FFFC0000      FFFE0000
> > 
> > Bank # 2: missing or unknown FLASH type
> 
> And what's this about Bank # 2???
> 
> This seems to be a bug. Please fix this first.

It is not a bug. This "Bank #2 " refer to the previous "## Unknown FLASH
on Bank 1". 
This device is a flash emulator (PromJet) on my board. If you are
unhappy with this 
information, I can remove it by setting my CFG_MAX_FLASH_BANKS to 1.

> 
> 
> > => md ff000000
> > ff000000: 27051956 552d426f 6f742031 2e312e34    '..VU-Boot 1.1.4
> > ff000010: 2d673230 38653063 38312d64 69727479    -g208e0c81-dirty
> ...
> > => cp.b ff000000 fff80000 20000
> > Copy to Flash... done
> 
> So you are copying some area within the *same*  memory  
> device  (your flash memory)...
> 
> > => md fff80000
> > fff80000: 56190527 6f422d55 3120746f 342e312e    V..'oB-U1 to4.1.
> > fff80010: 3032672d 63306538 642d3138 79747269    02g-c0e8d-18ytri
> 
> You read from memory, write to the same memory device, and  
> read  the written  data  back from the same memory device, 
> and find the data to be swapped?

Sure!

> 
> That would mean that reading and writing memory  use  
> different  byte order. If this is true, then you're screwed.
> 

Sorry. I do not touch alcohol  these days :). it is the same phenomena
copying 
data from  DDR ram to flash. 
The only modification I do is introducing a define 
__LITTLE_ENDIAN in file cfi_flash.c. Just as I said, If I 
define CFG_FLASH_USE_BUFFER_WRITE , it will
be OK.  I will explore this. Any comment?

Roy