[U-Boot-Users] Failure of 2 BAT schemes to enable D-cache

Om Vadlapatla pdfdoc15 at yahoo.com
Thu May 11 22:13:29 CEST 2006


Hello,

Processor:                           MPC8270
Debugger:                            Abatron BDI 2000
Board & processor Initialization by: Uboot 1.1.2

Aim: 
I try to enable d-cache at the Register level with out
having any exceptions. I will write my own code to
compile into the kernel that is no longer supported by
Montavista (3.0) provided it works when I manipulate
the registers.

Proceedure:
~in window 1 (DIP window) I reset the processor then
the flash mem loads the U-boot version 1.1.2. I do not
load the OS so the system is running at the U-boot
prompt.

=>

~In window 2 (BDI debugger window) I use the Abarton
BDI to force the PPC to enter debug mode by issuing -
"halt" instruction.
//this is the BDI window for both tests when "halt"
MPC8270>halt
 Target CPU        : MPC8280/MGT5200 (Zeppo)
    Target state      : debug mode
    Debug entry cause : COP halt
    Current PC        : 0x0ffe935c
    Current CR        : 0x44004044
    Current MSR       : 0x0000b002
    Current LR        : 0x0ffe13a8

~now by issueing commands from the BDI I try to set
the BATs and the MMU as follows:

I tried two BAT schemes on the abatron that are
attached in BAT_register_setting_table.txt &
8280_InitMMU.cmm :
-------------------------------------------------------
Test 1:- 

For seting DBAT regs by BDI commands ccording to
(BAT_register_setting_table.txt)or:

// initialize bats  
MPC8270>rm dbat0u 0xffe0003f
MPC8270>rm dbat0l 0xffe00022
MPC8270>rm dbat1u 0x00001fff
MPC8270>rm dbat1l 0x00000002
MPC8270>rm dbat2u 0x300007ff
MPC8270>rm dbat2l 0x30000002
MPC8270>rm dbat3u 0x400003FF
MPC8270>rm dbat3l 0x40000022
MPC8270>rm dbat4u 0xFB0001FF
MPC8270>rm dbat4l 0xFB000022
MPC8270>rm dbat5u 0xFE400003
MPC8270>rm dbat5l 0xFE400022
MPC8270>rm dbat6u 0xF0000003
MPC8270>rm dbat6l 0xF0000022
MPC8270>rm dbat7u 0xFF000003
MPC8270>rm dbat7l 0xFF000022

MPC8270>rm hid0 0x8000c088 // set HID0 to enable 
                           // I & D Cache

MPC8270>go // to let the processor run

I check the PC and it is at 0x200 the Machine check
exception. 
Please post suggestions to avoid the Exception!!
-------------------------------------------------------
Test 2:-
commands I issued throught Abatron BDI window:

// initialization of BATs refer to (8280_InitMMU.cmm)
// please keep in mind that even though these BAT 
// initialization are for a Stand alone systems I only
// plan to test if I am able to initialize the data 
// cache without the 0x200 (Machine check exception) 
// exception.

// 60-x SDRAM IBAT
MPC8270>rm ibat0u 0x000003fe // IBAT0U 32MB
MPC8270>rm ibat0l 0x00000002 // IBAT0L R/W

//IMMR IBAT
MPC8270>rm ibat1u 0x04700002 // IBAT1U 128KB
MPC8270>rm ibat1l 0x04700022 // IBAT0L I R/W

//Flash IBAT
MPC8270>rm ibat3u 0xff0000fe // IBAT3U 8MB
MPC8270>rm ibat3l 0xff000001 // IBAT3L R/O

//60-x SDRAM DBAT
MPC8270>rm dbat0u 0x000007fe // DBAT0U 16MB
MPC8270>rm dbat0l 0x00000002 // DBAT0L R/W

//Local SDRAM DBAT
MPC8270>rm dbat1u 0x0400007e //DBAT1U
MPC8270>rm dbat1l 0x0400002a //DBAT1L I,G R/W

//BCSR DBAT
MPC8270>rm dbat2u 0x0450007e //DBAT2U BCSR + IMMR
space
MPC8270>rm dbat2l 0x0450002a //DBAT2L I,G R/W

//Flash DBAT
MPC8270>rm dbat3u 0xff0000fe //DBAT3U 8MB
MPC8270>rm dbat3l 0xff000022 //DBAT3L I R/W

// the Bats initialize fine no problem till here 

// enable MMU (EE + ME + DR +IR)
MPC8270>rm msr 0x9030

// I feel I may be messing it up here (can some one
// please correct me?)

MPC8270>go // this is to let the processor run 
           // however ends up restarting the system 

// I dont issue the foll command coz of reset
MPC8270>rm hid0 0x8000c088  // this is to set and
                            // enable the I & D Caches
                            
This is how the DIP window where the boot prompt is
looks after this test 2:-
See attached file: DIP_outPut_test2_BATs.txt

Have I wrongly inilialized the MSR?
-------------------------------------------------------

Please post comments and suggestions of how I can
initialized MMU for d-cache performance. I am  new
to this.

Thanky you,
Best regards,

Om Vadlapatla

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