[U-Boot-Users] [PATCH] Fixed MPC8548CDS post-reset freeze

[Kim Phillips]

From: Dai Haruki <Dai.Haruki at freescale.com>

Fixed MPC8548CDS post-reset freeze

- Add MPC8543,8548_E SVR symbol
- Add Reset control register into global utility structure
- Fix MPC8548 family post-reset freeze

Signed-off-by: Dai Haruki <dai.haruki at freescale.com>
---

 cpu/mpc85xx/cpu.c            |   10 +++++++++-
 include/asm-ppc/immap_85xx.h |   14 ++++++++------
 include/asm-ppc/processor.h  |    2 ++
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 0507c47..0277f2c 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -145,7 +145,15 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd
 	 * Make sure MSR[DE] = 1
 	 */
 	unsigned long val;
-
+	unsigned long svr;
+
+	svr = SVR_VER(get_svr());
+	svr &= 0xfff3;  /* mask SEC flag */
+	if ( (svr == SVR_8548) || (svr == SVR_8543) ) {
+		volatile immap_t *immap = (immap_t *)CFG_IMMR;
+		volatile ccsr_gur_t *gur = &immap->im_gur;
+		gur->rstcr = 0x2;
+	}
 	val = mfspr(DBCR0);
 	val |= 0x70000000;
 	mtspr(DBCR0,val);
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 7a4345a..a16fc5b 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1574,19 +1574,21 @@ typedef struct ccsr_gur {
 	char	res9[12];
 	uint	pvr;		/* 0xe00a0 - Processor version register */
 	uint	svr;		/* 0xe00a4 - System version register */
-	char	res10[3416];
+	char    res10[8];
+	uint	rstcr;		/* 0xe00b0 - Reset control register */
+	char	res11[3404];
 	uint	clkocr;		/* 0xe0e00 - Clock out select register */
-	char	res11[12];
-	uint	ddrdllcr;	/* 0xe0e10 - DDR DLL control register */
 	char	res12[12];
+	uint	ddrdllcr;	/* 0xe0e10 - DDR DLL control register */
+	char	res13[12];
 	uint	lbcdllcr;	/* 0xe0e20 - LBC DLL control register */
-	char	res13[248];
+	char	res14[248];
 	uint	lbiuiplldcr0;	/* 0xe0f1c -- LBIU PLL Debug Reg 0 */
 	uint	lbiuiplldcr1;	/* 0xe0f20 -- LBIU PLL Debug Reg 1 */
 	uint	ddrioovcr;	/* 0xe0f24 - DDR IO Override Control */
-	uint	res14;		/* 0xe0f28 */
+	uint	res15;		/* 0xe0f28 */
 	uint	tsec34ioovcr;	/* 0xe0f2c - eTSEC 3/4 IO override control */
-	char	res15[61651];
+	char	res16[61651];
 } ccsr_gur_t;
 
 #define PORDEVSR_PCI	(0x00800000)	/* PCI Mode */
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 388dea4..5320fab 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -827,6 +827,8 @@ #define SVR_8540	0x8030
 #define SVR_8560	0x8070
 #define SVR_8555	0x8079
 #define SVR_8541	0x807A
+#define SVR_8543	0x8032
+#define SVR_8543_E	0x803A
 #define SVR_8548	0x8031
 #define SVR_8548_E	0x8039
 #define SVR_8641	0x8090
--
1.4.0