[U-Boot-Users] [PATCH] PPC40x: Rework CFG_INIT_DCACHE_CS Block to Avoid Machine Checks

[Wolfgang Denk]

In message <1210973711-1855-1-git-send-email-gerickson at nuovations.com> you wrote:
>
...
> cpu/ppc4xx/start.S:
>   Reworked code to handle the primordial stack and data area initialization when CFG_INIT_DCACHE_CS is asserted.
...
> -	 * Boards like the Kilauea (405EX) don't have OCM and can't use
> -	 * DCache for init-ram. So setup stack here directly after the
> -	 * SDRAM is initialized.
> +	 * For boards that don't have OCM and can't use the data cache
> +	 * for their primordial stack, setup stack here directly after the
> +	 * SDRAM is initialized in ext_bus_cntlr_init.

Was there ever a useful explanation given why these boards should not
be able to use DC as initial RAM?

Best regards,

Wolfgang Denk

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