[U-Boot] [PATCH 19/24] FSL DDR: Convert STXSSA to new DDR code.

[Kumar Gala]

On Oct 18, 2008, at 1:07 PM, Wolfgang Denk wrote:

> Dear Kumar,
>
> In message <1219817457-7432-19-git-send-email-galak at kernel.crashing.org 
> > you wrote:
>> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
>> ---
>> board/stxssa/Makefile    |    9 ++++--
>> board/stxssa/ddr.c       |   70 ++++++++++++++++++++++++++++++++++++ 
>> ++++++++++
>> board/stxssa/stxssa.c    |    6 +++-
>> board/stxssa/u-boot.lds  |    1 -
>> include/configs/stxssa.h |   30 +++++++++++--------
>> 5 files changed, 98 insertions(+), 18 deletions(-)
>> create mode 100644 board/stxssa/ddr.c
>
> How much of flexibility can be expected from the new DDR  code?  When
> you  submitted  this  patch, I verified that it works in the standard
> configuration (with a 256 MB RAM module). Should it  also  work  with
> other configurations, say, with a 512 MB or a 1 GB module?

It might, however I'm guessing you still need board tweaks for the  
timings associated with the different modules you are trying to use.

- k