[U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

[Alan Carvalho de Assis]

Hi Jean,

On Wed, 2008-10-22 at 11:59 +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:01 Tue 07 Oct     , Alan Carvalho de Assis wrote:
> > >From ae5af322e53d00d021f6d4aa39c6916e1d3e12b7 Mon Sep 17 00:00:00 2001
> > From: Alan Carvalho de Assis <alan.assis at freescale.com>
> > Date: Sun, 5 Oct 2008 20:00:59 -0300
> > Subject: [PATCH] iMX31: Add support to iMX31PDK board boots from NAND Flash
> > 
> > This patch adds support to iMX31PDK board to boot directly from NAND
> > Flash. In order to it works the previous patches (which reduces start.S
> > size and copy NAND code to RAM) need be applied first.
> > 
> > Signed-off-by: Alan Carvalho de Assis <alan.assis at freescale.com>
> > ---
> >  board/freescale/mx31pdk/lowlevel_init.S |   95 +++++++++++++++++++++++++++++-
> >  board/freescale/mx31pdk/u-boot.lds      |    3 +
> >  include/configs/mx31pdk.h               |   16 ++++--
> >  3 files changed, 105 insertions(+), 9 deletions(-)
> > 
>   Please rebase against u-boot-arm/master otherwhise ACK execpt some
>   whitespace see comment below
> 
>   Best Regards,
>   J.
> > diff --git a/board/freescale/mx31pdk/lowlevel_init.S
> > b/board/freescale/mx31pdk/lowlevel_init.S
> > index a94ea7f..71ab612 100644
> > --- a/board/freescale/mx31pdk/lowlevel_init.S
> > +++ b/board/freescale/mx31pdk/lowlevel_init.S
> > @@ -20,11 +20,98 @@
> >   * MA 02111-1307 USA
> >   */
> > 
> > -/*
> > - * This is just to keep the linker happy.
> > - */
> > +#include <asm/arch/mx31-regs.h>
> > +
> > +.macro REG reg, val
> > +	ldr r2, =\reg
> > +	ldr r3, =\val
> > +	str r3, [r2]
> > +.endm
> > +
> > +.macro REG8 reg, val
> > +	ldr r2, =\reg
> > +	ldr r3, =\val
> > +	strb r3, [r2]
> > +.endm
> > +
> > +.macro DELAY loops
> > +	ldr r2, =\loops
> > +1:
> > +	subs	r2, r2, #1
> > +	nop
> > +	bcs 1b
> > +.endm
> > 
> >  .globl lowlevel_init
> >  lowlevel_init:
> > -	mov	pc, lr
> > +	/* Store return address on the stack since lr is re-used in this file */
> > +	/* and all other registers are re-used as well */
> > +	str lr, [sp]
> > +
> > +	/* Also setup the Peripheral Port Remap register inside the core */
> > +	ldr r0, =ARM_PPMRR        /* start from AIPS 2GB region */
>                           ^^^^^^^^
> 	please use tab
> > +	mcr p15, 0, r0, c15, c2, 4
> > +
> > +	REG	IPU_CONF, IPU_CONF_DI_EN
> > +	REG	CCM_CCMR, 0x074B0BF5
> > +
> > +	DELAY 0x40000
> > +
> > +	REG	CCM_CCMR, 0x074B0BF5 | CCMR_MPE
> > +	REG	CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
> > +
> > +	/* Set up clock to 532MHz */
> > +	REG	CCM_PDR0, 0xFF871D58
> > +	REG	CCM_MPCTL, 0x0033280C
> > +	REG	CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
> > +
> > +	/* Set up CPLD on CS5 */
> > +	REG	CSCR_U(5), 0x0000D843
> > +	REG	CSCR_L(5), 0x22252521
> > +	REG	CSCR_A(5), 0x22220A00
> > +
> > +	/* Set up MX31 DDR Memory Controller */
> > +	REG	0x43FAC26C, 0 /* SDCLK */
> > +	REG	0x43FAC270, 0 /* CAS */
> > +	REG	0x43FAC274, 0 /* RAS */
> > +	REG	0x43FAC27C, 0x1000 /* CS2	CSD0) */
> > +	REG	0x43FAC284, 0 /* DQM3 */
> > +	REG	0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10	0x288..0x2DC) */
> > +	REG	0x43FAC28C, 0
> > +	REG	0x43FAC290, 0
> > +	REG	0x43FAC294, 0
> > +	REG	0x43FAC298, 0
> > +	REG	0x43FAC29C, 0
> > +	REG	0x43FAC2A0, 0
> > +	REG	0x43FAC2A4, 0
> > +	REG	0x43FAC2A8, 0
> > +	REG	0x43FAC2AC, 0
> > +	REG	0x43FAC2B0, 0
> > +	REG	0x43FAC2B4, 0
> > +	REG	0x43FAC2B8, 0
> > +	REG	0x43FAC2BC, 0
> > +	REG	0x43FAC2C0, 0
> > +	REG	0x43FAC2C4, 0
> > +	REG	0x43FAC2C8, 0
> > +	REG	0x43FAC2CC, 0
> > +	REG	0x43FAC2D0, 0
> > +	REG	0x43FAC2D4, 0
> > +	REG	0x43FAC2D8, 0
> > +	REG	0x43FAC2DC, 0
> > +	REG	0xB8001010, 0x00000004
> > +	REG	0xB8001004, 0x006ac73a
> > +	REG	0xB8001000, 0x92100000
> > +	REG	0x80000f00, 0x12344321
> > +	REG	0xB8001000, 0xa2100000
> > +	REG	0x80000000, 0x12344321
> > +	REG	0x80000000, 0x12344321
> > +	REG	0xB8001000, 0xb2100000
> > +	REG8	0x80000033, 0xda
> > +	REG8	0x81000000, 0xff
> > +	REG	0xB8001000, 0x82226080
> > +	REG	0x80000000, 0xDEADBEEF
> > +	REG	0xB8001010, 0x0000000c
> > +
> > +	/* Copy from NAND to RAM */
> > +	b nand_copy
> > 
> > diff --git a/board/freescale/mx31pdk/u-boot.lds
> > b/board/freescale/mx31pdk/u-boot.lds
> > index 1460adc..8602f3e 100644
> > --- a/board/freescale/mx31pdk/u-boot.lds
> > +++ b/board/freescale/mx31pdk/u-boot.lds
> > @@ -35,6 +35,9 @@ SECTIONS
> >  	.text	   :
> >  	{
> >  	  cpu/arm1136/start.o	(.text)
>         ^^
> 	please use tab
> > +	  board/freescale/mx31pdk/lowlevel_init.o	(.text)
>         ^^
> > +	  cpu/arm1136/mx31/nand_copy.o	(.text)
>         ^^
> > +	  . = 2K; /* lowlevel NAND needs to fit in 2KB of NFC buffer */
>         ^^
> >  	  *(.text)
>         ^^
> >  	}
> 
> Best Regards,
> J.

I can't rebase [PATCH 3/3] on u-boot-arm/master because it applies over
Magnus Lilja's patch "i.MX31: Add basic support for Freescale's i.MX31
PDK board." (968614d8c3f17eb834838de9a390ef4879fb1e77)

Can you please pull this patch from u-boot-arm/testing to
u-boot-arm/master ?

I rebased [PATCH 1-2/3] correctly, but will re-post them when I rebase
everything.

Best Regards,

Alan