[U-Boot] [PATCH V2] ppc4xx: use SPRN_TCR macro instead of tcr

[Wolfgang Denk]

Dear Matthias Fuchs,

In message <200907211154.16125.matthias.fuchs at esd.eu> you wrote:
> This patch migrates 4xx code from using the lowercase tcr macro
> to the SPRN_TCR macro. Both macros have been defined in the past.
> So one is to much and uppercase macros are much more common.
> 
> The lowercase macro conflicts with the upcoming
> introduction of the ppc4xx_gpio struct and it's tcr field.
> 
> Doing more such migration and getting rid of many defines from
> include/ppc405.h and include/ppc440.h should be put on
> our TODO list.
> 
> patch v2: better use SPRN_TCR instead of TCR

Hm... why are you just fixing this single register? It's not the only
one...

> diff --git a/include/ppc405.h b/include/ppc405.h
> index 917afec..50fc7be 100644
> --- a/include/ppc405.h
> +++ b/include/ppc405.h
> @@ -61,7 +61,6 @@
>  	#define  dear  0x3d5	  /* data exeption address register */
>  	#define  evpr  0x3d6	  /* exeption vector prefix register */
>  	#define  tsr   0x3d8	  /* timer status register */
> -	#define  tcr   0x3da	  /* timer control register */
>  	#define  pit   0x3db	  /* programmable interval timer */
>  	#define  sgr   0x3b9	  /* storage guarded reg      */
>  	#define  dcwr  0x3ba	  /* data cache write-thru reg*/
> diff --git a/include/ppc440.h b/include/ppc440.h
> index 01f6eaf..df78eea 100644
> --- a/include/ppc440.h
> +++ b/include/ppc440.h
> @@ -90,7 +90,6 @@
>  #define	 dvc1	0x13e	/* data value compare 1 */
>  #define	 dvc2	0x13f	/* data value compare 2 */
>  #define	 tsr	0x150	/* timer status register */
> -#define	 tcr	0x154	/* timer control register */
>  #define	 ivor0	0x190	/* interrupt vector offset register 0 */
>  #define	 ivor1	0x191	/* interrupt vector offset register 1 */
>  #define	 ivor2	0x192	/* interrupt vector offset register 2 */

_ALL_ these #defines for Special Purpose Registers should go away.
They are redundant.

Best regards,

Wolfgang Denk

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