[U-Boot] [U-boot][PATCH] AMCC ppc4xx /PLLOUTB/CPU clock/ Default bootstrap options A, B, C, D

Matthias Fuchs matthias.fuchs at esd.eu
Tue Jul 21 14:48:46 CEST 2009


Hi Rupjyoti,

On Tuesday 21 July 2009 14:20, Rupjyoti Sarmah wrote:
> Unstable 440EPx operation due to default bootsrtap options settings.
> The 440EPx fixed bootstrap options A,B,C,D sets PLL FWDVA to a value 1
> that results PLLOUTB being greater
> than the CPU clock frequency. This results unstable 440EPx operation
> causing hang conditions.
> 
> This is a patch fixing this problem. The patch touches two files
> speed.c and cpu_init.c.
> 
> Signed off by  Rupjyoti Sarmah < rsarmah at amcc.com > from Applied Micro
> --------------------------------------------------------------------------------------------------------------
> diff --git a/u-boot-2009.06/cpu/ppc4xx/cpu_init.c
> b/u-boot-2009.06/cpu/ppc4xx/cpu_init.c
> old mode 100644
> new mode 100755
> index 577d33f..550f6dc
> --- a/u-boot-2009.06/cpu/ppc4xx/cpu_init.c
> +++ b/u-boot-2009.06/cpu/ppc4xx/cpu_init.c
> @@ -1,337 +1,462 @@
Your patch seems to readd the complete files. I dare to say it's because you edited
this file on a wind**s maschine and it finally got execution permission.

Please resubmit a proper patch.

Matthias


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