[U-Boot] TSEC ethernet controller problems (crc errors/ corruption)

Liu Dave-R63238 DaveLiu at freescale.com
Tue Jun 2 22:44:54 CEST 2009


> What is the ACR register settings?
> What is the freq of core/csb/DDR and TSEC block?

And what is the SICRH[30-31]?
Did you have the matching settings for GMII with 3.3V?


More information about the U-Boot mailing list