[U-Boot] [PATCH v3 3/3] ppc/p1_p2_RDB: DDR Relocation supportfor NAND/SD/eSPI Boot

Dudhat Dipen-B09055 Dipen.Dudhat at freescale.com
Fri Oct 9 21:18:19 CEST 2009



-----Original Message-----
From: Wood Scott-B07421 
Sent: Friday, October 09, 2009 11:48 PM
To: Dudhat Dipen-B09055
Cc: u-boot at lists.denx.de
Subject: Re: [U-Boot] [PATCH v3 3/3] ppc/p1_p2_RDB: DDR Relocation
supportfor NAND/SD/eSPI Boot

On Fri, Oct 09, 2009 at 11:12:04PM +0530, Dipen Dudhat wrote:
> DDR support to boot from NAND/eSDHC/eSPI on P1 & P2 RDB platforms.
> Specifically this support needed when L2 Cache size is less than 512K.

If you're going to use this for eSDHC and eSPI, why is it sitting under
nand_spl?

To initialize DDR and create LAW in 4K nand_spl code.
Basically this patch adds support of DDR for NAND/eSDHC/eSPI boot on top
of L2 cache support on P1 and P2 RDB Platforms.

So do I need to split this patch in two parts?? For NAND and
eSDHC/eSPI??

-Scott


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