[U-Boot] [PATCH 2/2]: arm:kirkwood: Add hardware watchdog support for Marvell Kirkwood boards

[Prafulla Wadaskar]

> -----Original Message-----
> From: Simon Kagstrom [mailto:simon.kagstrom at netinsight.net] 
> Sent: Wednesday, October 28, 2009 7:46 PM
> To: U-Boot ML; Prafulla Wadaskar
> Subject: [PATCH 2/2]: arm:kirkwood: Add hardware watchdog 
> support for Marvell Kirkwood boards
> 
> Initialize by calling the generic API watchdog_enable() with 
> the number
> of seconds for the watchdog to timeout. It's not possible to 
> disable the
> watchdog once it's on.
> 
> Signed-off-by: Simon Kagstrom <simon.kagstrom at netinsight.net>
> ---
> ChangeLog:
> 
>  v2: (Some of the comments from Prafulla)
>    * Use readl/writel
>    * Rename WATCHDOG_CNTR -> WATCHDOG_TMR
> 
>  cpu/arm926ejs/kirkwood/timer.c |   37 
> +++++++++++++++++++++++++++++++++++++
>  1 files changed, 37 insertions(+), 0 deletions(-)
> 
> diff --git a/cpu/arm926ejs/kirkwood/timer.c 
> b/cpu/arm926ejs/kirkwood/timer.c
> index 817ff42..797ab04 100644
> --- a/cpu/arm926ejs/kirkwood/timer.c
> +++ b/cpu/arm926ejs/kirkwood/timer.c
> @@ -23,8 +23,10 @@
>  
>  #include <common.h>
>  #include <asm/arch/kirkwood.h>
> +#include <watchdog.h>
>  
>  #define UBOOT_CNTR	0	/* counter to use for uboot timer */
> +#define WATCHDOG_TMR	2
>  
>  /* Timer reload and current value registers */
>  struct kwtmr_val {
> @@ -166,3 +168,38 @@ int timer_init(void)
>  
>  	return 0;
>  }
> +
> +#if defined(CONFIG_HW_WATCHDOG)
> +static unsigned long watchdog_timeout = 5;
> +void hw_watchdog_reset(void)
> +{
> +	u32 time = CONFIG_SYS_TCLK * watchdog_timeout;
> +
> +	writel(time, CNTMR_VAL_REG(WATCHDOG_TMR));
> +}
> +
> +void watchdog_enable(unsigned int timeout_secs)
> +{
> +	struct kwcpu_registers *cpureg =
> +		(struct kwcpu_registers *)KW_CPU_REG_BASE;
> +	u32 rstoutn_mask;
> +	u32 cntmrctrl;
> +
> +	watchdog_timeout = timeout_secs;
> +	/* Enable CPU reset if watchdog expires */
> +	rstoutn_mask = readl(cpureg->rstoutn_mask);
> +	writel(rstoutn_mask |= WATCHDOG_TMR, &cpureg->rstoutn_mask);
> +	hw_watchdog_reset();
> +
> +	/* Enable the watchdog */
> +	cntmrctrl = readl(CNTMR_CTRL_REG);
> +	cntmrctrl |= CTCR_ARM_TIMER_EN(WATCHDOG_TMR);
> +	cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(WATCHDOG_TMR);
> +	writel(cntmrctrl, CNTMR_CTRL_REG);
> +}
> +
> +void watchdog_disable(void)
> +{
> +	/* Can't be done */

you can disable CPU reset if watchdog expires to achieve this functionality
Or reseting bit 4 in CPU timer control reg

Regards..
Prafulla . .

> +}
> +#endif
> -- 
> 1.6.0.4
> 
>