[U-Boot] [PATCH 11/11] powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured

Kumar Gala galak at kernel.crashing.org
Sat Dec 18 00:52:52 CET 2010


[Forgot to CC board maintainers, please review]

On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:

> Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
> replace the is_fsl_pci_cfg() code with the is_serdes_configured().
> 
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> ---
> arch/powerpc/cpu/mpc8xxx/Makefile         |    1 -
> arch/powerpc/cpu/mpc8xxx/pci_cfg.c        |  204 -----------------------------
> arch/powerpc/include/asm/fsl_pci.h        |    2 -
> board/freescale/mpc8544ds/mpc8544ds.c     |    7 +-
> board/freescale/mpc8548cds/mpc8548cds.c   |    3 +-
> board/freescale/mpc8568mds/mpc8568mds.c   |    3 +-
> board/freescale/mpc8569mds/mpc8569mds.c   |    3 +-
> board/freescale/mpc8572ds/mpc8572ds.c     |    7 +-
> board/freescale/mpc8610hpcd/mpc8610hpcd.c |   11 +-
> board/freescale/mpc8641hpcn/mpc8641hpcn.c |    5 +-
> board/freescale/p1_p2_rdb/pci.c           |   10 +-
> board/freescale/p2020ds/p2020ds.c         |    7 +-
> board/sbc8548/sbc8548.c                   |    3 +-
> board/sbc8641d/sbc8641d.c                 |    5 +-
> board/tqc/tqm85xx/tqm85xx.c               |    5 +-
> board/xes/common/fsl_8xxx_pci.c           |   11 +-
> 16 files changed, 39 insertions(+), 248 deletions(-)
> delete mode 100644 arch/powerpc/cpu/mpc8xxx/pci_cfg.c
> 
> diff --git a/arch/powerpc/cpu/mpc8xxx/Makefile b/arch/powerpc/cpu/mpc8xxx/Makefile
> index ab80dd7..95c73be 100644
> --- a/arch/powerpc/cpu/mpc8xxx/Makefile
> +++ b/arch/powerpc/cpu/mpc8xxx/Makefile
> @@ -12,7 +12,6 @@ LIB	= $(obj)lib8xxx.o
> 
> ifneq ($(CPU),mpc83xx)
> COBJS-y	+= cpu.o
> -COBJS-$(CONFIG_PCI)	+= pci_cfg.o
> endif
> 
> COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
> diff --git a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
> deleted file mode 100644
> index 53236a3..0000000
> --- a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
> +++ /dev/null
> @@ -1,204 +0,0 @@
> -/*
> - * Copyright 2009-2010 Freescale Semiconductor, Inc.
> - *
> - * See file CREDITS for list of people who contributed to this
> - * project.
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License as
> - * published by the Free Software Foundation; either version 2 of
> - * the License, or (at your option) any later version.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
> - *
> - * You should have received a copy of the GNU General Public License
> - * along with this program; if not, write to the Free Software
> - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> - * MA 02111-1307 USA
> - */
> -
> -#include <common.h>
> -#include <asm/fsl_law.h>
> -#include <pci.h>
> -
> -struct pci_info {
> -	u32	cfg;
> -};
> -
> -/* The cfg field is a bit mask in which each bit represents the value of
> - * cfg_IO_ports[] signal and the bit is set if the interface would be
> - * enabled based on the value of cfg_IO_ports[] signal
> - *
> - * On MPC86xx/PQ3 based systems:
> - *   we extract cfg_IO_ports from GUTS register PORDEVSR
> - *
> - * cfg_IO_ports only exist on systems w/PCIe (we set cfg 0 for systems
> - * without PCIe)
> - */
> -
> -#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8560)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCI] = {
> -		.cfg =   0,
> -	},
> -};
> -#elif defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCI] = {
> -		.cfg =   0,
> -	},
> -};
> -#elif defined(CONFIG_MPC8536)
> -static struct pci_info pci_config_info[] =
> -{
> -};
> -#elif defined(CONFIG_MPC8544)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCI] = {
> -		.cfg =   0,
> -	},
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
> -			 (1 << 6) | (1 << 7),
> -	},
> -	[LAW_TRGT_IF_PCIE_2] = {
> -		.cfg =   (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7),
> -	},
> -	[LAW_TRGT_IF_PCIE_3] = {
> -		.cfg =   (1 << 6) | (1 << 7),
> -	},
> -};
> -#elif defined(CONFIG_MPC8548)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCI_1] = {
> -		.cfg =   0,
> -	},
> -	[LAW_TRGT_IF_PCI_2] = {
> -		.cfg =   0,
> -	},
> -	/* PCI_2 is always host and we dont use iosel to determine enable/disable */
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 3) | (1 << 4) | (1 << 7),
> -	},
> -};
> -#elif defined(CONFIG_MPC8568)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCI] = {
> -		.cfg =   0,
> -	},
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 3) | (1 << 4) | (1 << 7),
> -	},
> -};
> -#elif defined(CONFIG_MPC8569)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 0) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
> -			 (1 << 8) | (1 << 0xc) | (1 << 0xf),
> -	},
> -};
> -#elif defined(CONFIG_MPC8572)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 2) | (1 << 3) | (1 << 7) |
> -			 (1 << 0xb) | (1 << 0xc) | (1 << 0xf),
> -	},
> -	[LAW_TRGT_IF_PCIE_2] = {
> -		.cfg =   (1 << 3) | (1 << 7),
> -	},
> -	[LAW_TRGT_IF_PCIE_3] = {
> -		.cfg =   (1 << 7),
> -	},
> -};
> -#elif defined(CONFIG_MPC8610)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCI_1] = {
> -		.cfg =   0,
> -	},
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 1) | (1 << 4),
> -	},
> -	[LAW_TRGT_IF_PCIE_2] = {
> -		.cfg =   (1 << 0) | (1 << 4),
> -	},
> -};
> -#elif defined(CONFIG_MPC8641)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) |
> -			 (1 << 7) | (1 << 0xf),
> -	},
> -	[LAW_TRGT_IF_PCIE_2] = {
> -		.cfg =   (1 << 3) | (1 << 0xe) | (1 << 0xf),
> -	},
> -};
> -#elif defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
> -      defined(CONFIG_P1012) || defined(CONFIG_P1021)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 0) | (1 << 6) | (1 << 0xe) | (1 << 0xf),
> -	},
> -	[LAW_TRGT_IF_PCIE_2] = {
> -		.cfg =   (1 << 0xe),
> -	},
> -};
> -#elif defined(CONFIG_P1013) || defined(CONFIG_P1022)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 6) | (1 << 7) | (1 << 9) | (1 << 0xa) |
> -			 (1 << 0xb) | (1 << 0xd) | (1 << 0xe) |
> -			 (1 << 0xf) | (1 << 0x15) | (1 << 0x16) |
> -			 (1 << 0x17) | (1 << 0x18) | (1 << 0x19) |
> -			 (1 << 0x1a) | (1 << 0x1b) | (1 << 0x1c) |
> -			 (1 << 0x1d) | (1 << 0x1e) | (1 << 0x1f),
> -	},
> -	[LAW_TRGT_IF_PCIE_2] = {
> -		.cfg =   (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
> -			 (1 << 0xd) | (1 << 0x15) | (1 << 0x16) | (1 << 0x17) |
> -			 (1 << 0x18) | (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b),
> -	},
> -	[LAW_TRGT_IF_PCIE_3] = {
> -		.cfg =   (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
> -			 (1 << 0xa) | (1 << 0xb) | (1 << 0xd) | (1 << 0x15) |
> -			 (1 << 0x16) | (1 << 0x17) | (1 << 0x18) | (1 << 0x1c),
> -	},
> -};
> -#elif defined(CONFIG_P2010) || defined(CONFIG_P2020)
> -static struct pci_info pci_config_info[] =
> -{
> -	[LAW_TRGT_IF_PCIE_1] = {
> -		.cfg =   (1 << 0) | (1 << 2) | (1 << 4) | (1 << 6) |
> -			 (1 << 0xd) | (1 << 0xe) | (1 << 0xf),
> -	},
> -	[LAW_TRGT_IF_PCIE_2] = {
> -		.cfg =   (1 << 2) | (1 << 0xe),
> -	},
> -	[LAW_TRGT_IF_PCIE_3] = {
> -		.cfg =   (1 << 2) | (1 << 4),
> -	},
> -};
> -#elif defined(CONFIG_FSL_CORENET)
> -#else
> -#error Need to define pci_config_info for processor
> -#endif
> -
> -#ifndef CONFIG_FSL_CORENET
> -int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel)
> -{
> -	return ((1 << io_sel) & pci_config_info[trgt].cfg);
> -}
> -#endif
> diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h
> index ab0f3ee..5cbe139 100644
> --- a/arch/powerpc/include/asm/fsl_pci.h
> +++ b/arch/powerpc/include/asm/fsl_pci.h
> @@ -23,8 +23,6 @@
> 
> #include <asm/fsl_law.h>
> 
> -int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel);
> -
> int fsl_setup_hose(struct pci_controller *hose, unsigned long addr);
> int fsl_is_pci_agent(struct pci_controller *hose);
> void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data);
> diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
> index 31c3fad..3285cea 100644
> --- a/board/freescale/mpc8544ds/mpc8544ds.c
> +++ b/board/freescale/mpc8544ds/mpc8544ds.c
> @@ -28,6 +28,7 @@
> #include <asm/immap_85xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <asm/io.h>
> #include <miiphy.h>
> #include <libfdt.h>
> @@ -127,7 +128,7 @@ void pci_init_board(void)
> 	puts("\n");
> 
> #ifdef CONFIG_PCIE3
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE3);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
> 		SET_STD_PCIE_INFO(pci_info[num], 3);
> @@ -162,7 +163,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> @@ -193,7 +194,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE2
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE2);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
> 		SET_STD_PCIE_INFO(pci_info[num], 2);
> diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
> index 14c902c..ebeb897 100644
> --- a/board/freescale/mpc8548cds/mpc8548cds.c
> +++ b/board/freescale/mpc8548cds/mpc8548cds.c
> @@ -29,6 +29,7 @@
> #include <asm/immap_85xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <spd_sdram.h>
> #include <miiphy.h>
> #include <libfdt.h>
> @@ -332,7 +333,7 @@ void pci_init_board(void)
> #endif /* CONFIG_PCI2 */
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
> index d74fcac..71cfbf0 100644
> --- a/board/freescale/mpc8568mds/mpc8568mds.c
> +++ b/board/freescale/mpc8568mds/mpc8568mds.c
> @@ -29,6 +29,7 @@
> #include <asm/immap_85xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <spd_sdram.h>
> #include <i2c.h>
> #include <ioports.h>
> @@ -399,7 +400,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
> index dc0884e..9700b8c 100644
> --- a/board/freescale/mpc8569mds/mpc8569mds.c
> +++ b/board/freescale/mpc8569mds/mpc8569mds.c
> @@ -31,6 +31,7 @@
> #include <asm/immap_85xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <asm/io.h>
> #include <spd_sdram.h>
> #include <i2c.h>
> @@ -579,7 +580,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
> index 120f35c..15a4d31 100644
> --- a/board/freescale/mpc8572ds/mpc8572ds.c
> +++ b/board/freescale/mpc8572ds/mpc8572ds.c
> @@ -30,6 +30,7 @@
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> #include <asm/io.h>
> +#include <asm/fsl_serdes.h>
> #include <miiphy.h>
> #include <libfdt.h>
> #include <fdt_support.h>
> @@ -187,7 +188,7 @@ void pci_init_board(void)
> 
> 	puts("\n");
> #ifdef CONFIG_PCIE3
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE3);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
> 		SET_STD_PCIE_INFO(pci_info[num], 3);
> @@ -219,7 +220,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE2
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE2);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
> 		SET_STD_PCIE_INFO(pci_info[num], 2);
> @@ -239,7 +240,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
> index 61a635d..8abd917 100644
> --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
> +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
> @@ -27,6 +27,7 @@
> #include <asm/immap_86xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <i2c.h>
> #include <asm/io.h>
> #include <libfdt.h>
> @@ -225,7 +226,7 @@ void pci_init_board(void)
> 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
> 	volatile ccsr_gur_t *gur = &immap->im_gur;
> 	struct fsl_pci_info pci_info[3];
> -	u32 devdisr, pordevsr, io_sel;
> +	u32 devdisr, pordevsr;
> 	int first_free_busno = 0;
> 	int num = 0;
> 
> @@ -233,13 +234,9 @@ void pci_init_board(void)
> 
> 	devdisr = in_be32(&gur->devdisr);
> 	pordevsr = in_be32(&gur->pordevsr);
> -	io_sel = (pordevsr & MPC8610_PORDEVSR_IO_SEL)
> -			>> MPC8610_PORDEVSR_IO_SEL_SHIFT;
> -
> -	debug ("   pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> @@ -260,7 +257,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE2
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE2);
> 
> 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){
> 		SET_STD_PCIE_INFO(pci_info[num], 2);
> diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
> index 882ff0b..e951021 100644
> --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
> +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
> @@ -26,6 +26,7 @@
> #include <asm/immap_86xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <asm/io.h>
> #include <libfdt.h>
> #include <fdt_support.h>
> @@ -147,9 +148,7 @@ void pci_init_board(void)
> 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
> 	volatile ccsr_gur_t *gur = &immap->im_gur;
> 	uint devdisr = in_be32(&gur->devdisr);
> -	uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
> -		>> MPC8641_PORDEVSR_IO_SEL_SHIFT;
> -	int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	int pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c
> index 2a2d6b7..e95431b 100644
> --- a/board/freescale/p1_p2_rdb/pci.c
> +++ b/board/freescale/p1_p2_rdb/pci.c
> @@ -24,6 +24,7 @@
> #include <command.h>
> #include <pci.h>
> #include <asm/immap_85xx.h>
> +#include <asm/fsl_serdes.h>
> #include <asm/io.h>
> #include <asm/fsl_pci.h>
> #include <libfdt.h>
> @@ -43,7 +44,7 @@ void pci_init_board(void)
> {
> 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
> 	struct fsl_pci_info pci_info[2];
> -	u32 devdisr, pordevsr, io_sel;
> +	u32 devdisr, pordevsr;
> 	int first_free_busno = 0;
> 	int num = 0;
> 
> @@ -51,16 +52,13 @@ void pci_init_board(void)
> 
> 	devdisr = in_be32(&gur->devdisr);
> 	pordevsr = in_be32(&gur->pordevsr);
> -	io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
> -
> -	debug ("   pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
> 
> 	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
> 		printf("eTSEC2 is in sgmii mode.\n");
> 
> 	puts("\n");
> #ifdef CONFIG_PCIE2
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE2);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 2);
> @@ -79,7 +77,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
> index b05ef98..a40be13 100644
> --- a/board/freescale/p2020ds/p2020ds.c
> +++ b/board/freescale/p2020ds/p2020ds.c
> @@ -30,6 +30,7 @@
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> #include <asm/io.h>
> +#include <asm/fsl_serdes.h>
> #include <miiphy.h>
> #include <libfdt.h>
> #include <fdt_support.h>
> @@ -210,7 +211,7 @@ void pci_init_board(void)
> 
> 	puts("\n");
> #ifdef CONFIG_PCIE2
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE2);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 2);
> @@ -250,7 +251,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE3
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE3);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 3);
> @@ -269,7 +270,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
> index 272428f..06c1eea 100644
> --- a/board/sbc8548/sbc8548.c
> +++ b/board/sbc8548/sbc8548.c
> @@ -32,6 +32,7 @@
> #include <asm/immap_85xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <spd_sdram.h>
> #include <netdev.h>
> #include <tsec.h>
> @@ -364,7 +365,7 @@ pci_init_board(void)
> 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable PCI2 */
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
> index 5bf2364..5ee8f73 100644
> --- a/board/sbc8641d/sbc8641d.c
> +++ b/board/sbc8641d/sbc8641d.c
> @@ -35,6 +35,7 @@
> #include <asm/immap_86xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/fsl_ddr_sdram.h>
> +#include <asm/fsl_serdes.h>
> #include <libfdt.h>
> #include <fdt_support.h>
> 
> @@ -210,13 +211,11 @@ void pci_init_board(void)
> 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
> 	volatile ccsr_gur_t *gur = &immap->im_gur;
> 	uint devdisr = in_be32(&gur->devdisr);
> -	uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
> -		>> MPC8641_PORDEVSR_IO_SEL_SHIFT;
> 	int pcie_ep;
> 	int num = 0;
> 
> #ifdef CONFIG_PCIE1
> -	int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	int pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c
> index 527af6d..43c73e1 100644
> --- a/board/tqc/tqm85xx/tqm85xx.c
> +++ b/board/tqc/tqm85xx/tqm85xx.c
> @@ -38,6 +38,7 @@
> #include <asm/immap_85xx.h>
> #include <asm/fsl_pci.h>
> #include <asm/io.h>
> +#include <asm/fsl_serdes.h>
> #include <linux/compiler.h>
> #include <ioports.h>
> #include <flash.h>
> @@ -555,8 +556,6 @@ void pci_init_board (void)
> 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
> 	u32 devdisr = in_be32(&gur->devdisr);
> 	u32 pordevsr = in_be32(&gur->pordevsr);
> -	__maybe_unused uint io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
> -			MPC85xx_PORDEVSR_IO_SEL_SHIFT;
> 
> #ifdef CONFIG_PCI1
> 	uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
> @@ -598,7 +597,7 @@ void pci_init_board (void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
> index 4a0965b..4135849 100644
> --- a/board/xes/common/fsl_8xxx_pci.c
> +++ b/board/xes/common/fsl_8xxx_pci.c
> @@ -24,6 +24,7 @@
> #include <common.h>
> #include <pci.h>
> #include <asm/fsl_pci.h>
> +#include <asm/fsl_serdes.h>
> #include <asm/io.h>
> #include <linux/compiler.h>
> #include <libfdt.h>
> @@ -81,11 +82,9 @@ void pci_init_board(void)
> 	volatile ccsr_gur_t *gur = &immap->im_gur;
> #endif
> 	u32 devdisr = in_be32(&gur->devdisr);
> -	u32 pordevsr = in_be32(&gur->pordevsr);
> -	__maybe_unused uint io_sel = (pordevsr & MPC8xxx_PORDEVSR_IO_SEL) >>
> -			MPC8xxx_PORDEVSR_IO_SEL_SHIFT;
> 
> #ifdef CONFIG_PCI1
> +	u32 pordevsr = in_be32(&gur->pordevsr);
> 	uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
> 	uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
> 	uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
> @@ -114,7 +113,7 @@ void pci_init_board(void)
> #endif
> 
> #ifdef CONFIG_PCIE1
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE1);
> 
> 	if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 1);
> @@ -131,7 +130,7 @@ void pci_init_board(void)
> #endif /* CONFIG_PCIE1 */
> 
> #ifdef CONFIG_PCIE2
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE2);
> 
> 	if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 2);
> @@ -148,7 +147,7 @@ void pci_init_board(void)
> #endif /* CONFIG_PCIE2 */
> 
> #ifdef CONFIG_PCIE3
> -	pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
> +	pcie_configured = is_serdes_configured(PCIE3);
> 
> 	if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) {
> 		SET_STD_PCIE_INFO(pci_info[num], 3);
> -- 
> 1.7.2.3
> 
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