[U-Boot] [PATCH V4 3/3] Add support for the LaCie ED Mini V2 board

[Albert ARIBAUD]

Hi Prafulla,

Prafulla Wadaskar a écrit :
>  
> 
>> -----Original Message-----
>> From: Albert ARIBAUD [mailto:albert.aribaud at free.fr] 
>> Sent: Monday, January 11, 2010 5:42 PM
>> To: Prafulla Wadaskar
>> Cc: U-Boot at lists.denx.de
>> Subject: Re: [U-Boot] [PATCH V4 3/3] Add support for the 
>> LaCie ED Mini V2 board
>>
>> Prafulla Wadaskar a écrit :
>>
>>> I still do not understand who will fectch u-boot binary to 
>> TEXT_BASE? (reported earlier)
>>> Is this flash XIP? Does u-boot binary below 16k? What is 
>> the size of flash?
>>> Pls refer my comments for v3
>> I thought I'd explained that already, haven't I? At power-up 
>> a ROM code
>> at FFFF0000 (64KB of ROM taking precedence over CS0, as seen 
>> from JTAG) 
>> does a few checks then jumps to FFF90000, which is the NOR Flash. The 
>> U-boot image is mapped and flashed so that the entry point is at 
>> FFF90000. The entry point then does further inits (some under 
>> condition 
>> that SKIP_CONFIG_LOWLEVEL_INIT is not defined), initializes RAM, 
>> relocates code to TEXT_BASE (if CONFIG_SKIP_RELOCATE_UBOOT is not 
>> defined) and then jumps to it.
>>
> 
> Okay.
> I am referring to 5281 users manual section 17.2.1 and that does not have these details.

Watch out: ED Mini is 5182-based, not 5281. However, the 5182 docs don't 
mention this FFF90000 business either. This was found by readint the 
source code made available by LaCie for this board (more below).

> Or
> is ROM sitting at 0xffff0000 already have a code that does above?
> Or
> Are you pointing to Boot ROM Support that 5281 have?

The ED Mini only has Flash sitting on BOOTCS -- not CS0 as I mistakenly 
wrote: CS0 is for the 64M SDRAM.

The final mapping of the 512KB Flash is FFF80000. However, the 5182 user 
manual says BOOTCS at reset is at F8000000-FFFFFFFF, which means the 
Flash will mirror every 512Kb over this area, thus *normally* FFFF0000 
should be the last 64K of the Flash. However the U-boot image does not 
contain reset vectors there -- they're at FFF90000, and built so as to 
be there -- and a JTAG reset execution path analysis shows different 
code at FFFF0000 than what e.g. an U-boot 'md.b ffff0000 100' will show. 
Following the reset code shows a machine ID check and, in the case of a 
5182, a jump to FFF90000, which is both the last mirror of the Flash 
before BOOTCS reprogramming and and its final location afterward.

> Do you have any reference for all this explanation?
> Or can you point any reference for me to look for?

I'm afraid there's no documented reference. My reference for building 
U-boot to start from NOR Flash at FFF90000 comes from the (much older) 
U-boot source code provided by LaCie, which did not contain explanations 
as to the reason for starting at this address; and the existence of ROM 
code was later observed through JTAG reset execution path analysis.

> Regards..
> Prafulla . .

Amicalement,
-- 
Albert.