[U-Boot] [PATCH V2 3/6] mv_egiga: bugfix: DMA issue fixed using volatile

[Prafulla Wadaskar]

> -----Original Message-----
> From: Albert ARIBAUD [mailto:albert.aribaud at free.fr] 
> Sent: Friday, July 09, 2010 3:24 PM
> To: Prafulla Wadaskar
> Cc: u-boot at lists.denx.de
> Subject: Re: [PATCH V2 3/6] mv_egiga: bugfix: DMA issue fixed 
> using volatile
> 
Snip..
> >> diff --git a/drivers/net/mv_egiga.h b/drivers/net/mv_egiga.h
> >> index 61c3157..c49bf40 100644
> >> --- a/drivers/net/mv_egiga.h
> >> +++ b/drivers/net/mv_egiga.h
> >> @@ -342,108 +342,108 @@
> >>
> >>   /* structures represents Controller registers */
> >>   struct mv_egiga_barsz {
> >> -	u32 bar;
> >> -	u32 size;
> >> +	volatile u32 bar;
> >> +	volatile u32 size;
> >
> > May be, making all volatile solves problem at your end, 
> that does not mean it is solution.
> > Mostly all registers are accessed as volatile 
> (readl/writel), register pointers are also volatile.
> >
> > I agree with you and suspect some code related to DMA pipes 
> initialization has problem that's breaking it's functionality 
> on Orion5X.
> >
> > I think we should debug on this to fix the bug correctly.
> >
> > Regards..
> > Prafulla . .
> 
> I have debugged the issue when it happened and found out that 
> the it is 
> not really about doing volatile accesses, but about doing accesses 
> out-of-order: the compiler intermixes writes from adjacent 
> source code 
> lines, which causes the write to the DMA start bit to occur before 
> writes to the descriptors are done. Apparently qualifying the struct 
> members volatile has an effect or write order that 
> readl/writel have not.

You can use volatile qualifier for the variables in DMA specific code instead of modifying structures,
Try to use memory barrier or something like that-
Some ref : http://gcc.gnu.org/ml/gcc/2003-04/msg01180.html
may be someone c-expert on the list can suggest better

Regards..
Prafulla . .
>