[U-Boot] [PATCH 4/4] DA8xx: fix LPSC constants

Laurence Withers lwithers at guralp.com
Sat Jul 16 12:51:27 CEST 2011


Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.

Signed-off-by: Laurence Withers <lwithers at guralp.com>
---
 arch/arm/include/asm/arch-davinci/hardware.h |   43 ++++++++++++++++++-------
 1 files changed, 31 insertions(+), 12 deletions(-)

diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index 551b469..f537c4b 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -234,27 +234,46 @@ typedef volatile unsigned int *	dv_reg_p;
 
 /* for LPSCs in PSC1, offset from 32 for differentiation */
 #define DAVINCI_LPSC_PSC1_BASE		32
-#define DAVINCI_LPSC_USB11		(DAVINCI_LPSC_PSC1_BASE + 1)
-#define DAVINCI_LPSC_USB20		(DAVINCI_LPSC_PSC1_BASE + 2)
+#define DAVINCI_LPSC_USB20		(DAVINCI_LPSC_PSC1_BASE + 1)
+#define DAVINCI_LPSC_USB11		(DAVINCI_LPSC_PSC1_BASE + 2)
 #define DAVINCI_LPSC_GPIO		(DAVINCI_LPSC_PSC1_BASE + 3)
 #define DAVINCI_LPSC_UHPI		(DAVINCI_LPSC_PSC1_BASE + 4)
 #define DAVINCI_LPSC_EMAC		(DAVINCI_LPSC_PSC1_BASE + 5)
 #define DAVINCI_LPSC_DDR_EMIF		(DAVINCI_LPSC_PSC1_BASE + 6)
 #define DAVINCI_LPSC_McASP0		(DAVINCI_LPSC_PSC1_BASE + 7)
-#define DAVINCI_LPSC_McASP1		(DAVINCI_LPSC_PSC1_BASE + 8)
-#define DAVINCI_LPSC_McASP2		(DAVINCI_LPSC_PSC1_BASE + 9)
 #define DAVINCI_LPSC_SPI1		(DAVINCI_LPSC_PSC1_BASE + 10)
 #define DAVINCI_LPSC_I2C1		(DAVINCI_LPSC_PSC1_BASE + 11)
 #define DAVINCI_LPSC_UART1		(DAVINCI_LPSC_PSC1_BASE + 12)
 #define DAVINCI_LPSC_UART2		(DAVINCI_LPSC_PSC1_BASE + 13)
-#define DAVINCI_LPSC_LCDC		(DAVINCI_LPSC_PSC1_BASE + 14)
-#define DAVINCI_LPSC_ePWM		(DAVINCI_LPSC_PSC1_BASE + 15)
-#define DAVINCI_LPSC_eCAP		(DAVINCI_LPSC_PSC1_BASE + 16)
-#define DAVINCI_LPSC_eQEP		(DAVINCI_LPSC_PSC1_BASE + 17)
-#define DAVINCI_LPSC_SCR_P0		(DAVINCI_LPSC_PSC1_BASE + 18)
-#define DAVINCI_LPSC_SCR_P1		(DAVINCI_LPSC_PSC1_BASE + 19)
-#define DAVINCI_LPSC_CR_P3		(DAVINCI_LPSC_PSC1_BASE + 20)
-#define DAVINCI_LPSC_L3_CBA_RAM		(DAVINCI_LPSC_PSC1_BASE + 21)
+#define DAVINCI_LPSC_LCDC		(DAVINCI_LPSC_PSC1_BASE + 16)
+#define DAVINCI_LPSC_ePWM		(DAVINCI_LPSC_PSC1_BASE + 17)
+#define DAVINCI_LPSC_eCAP		(DAVINCI_LPSC_PSC1_BASE + 20)
+#define DAVINCI_LPSC_L3_CBA_RAM		(DAVINCI_LPSC_PSC1_BASE + 31)
+
+/* DA830-specific peripherals */
+#define DAVINCI_LPSC_McASP1		(DAVINCI_LPSC_PSC1_BASE + 8)
+#define DAVINCI_LPSC_McASP2		(DAVINCI_LPSC_PSC1_BASE + 9)
+#define DAVINCI_LPSC_eQEP		(DAVINCI_LPSC_PSC1_BASE + 21)
+#define DAVINCI_LPSC_SCR8		(DAVINCI_LPSC_PSC1_BASE + 24)
+#define DAVINCI_LPSC_SCR7		(DAVINCI_LPSC_PSC1_BASE + 25)
+#define DAVINCI_LPSC_SCR12		(DAVINCI_LPSC_PSC1_BASE + 26)
+
+/* DA850-specific peripherals */
+#define DAVINCI_LPSC_TPCC1		(DAVINCI_LPSC_PSC1_BASE + 0)
+#define DAVINCI_LPSC_SATA		(DAVINCI_LPSC_PSC1_BASE + 8)
+#define DAVINCI_LPSC_VPIF		(DAVINCI_LPSC_PSC1_BASE + 9)
+#define DAVINCI_LPSC_McBSP0		(DAVINCI_LPSC_PSC1_BASE + 14)
+#define DAVINCI_LPSC_McBSP1		(DAVINCI_LPSC_PSC1_BASE + 15)
+#define DAVINCI_LPSC_MMC_SD1		(DAVINCI_LPSC_PSC1_BASE + 18)
+#define DAVINCI_LPSC_uPP		(DAVINCI_LPSC_PSC1_BASE + 19)
+#define DAVINCI_LPSC_TPTC2		(DAVINCI_LPSC_PSC1_BASE + 21)
+#define DAVINCI_LPSC_SCR_F0		(DAVINCI_LPSC_PSC1_BASE + 24)
+#define DAVINCI_LPSC_SCR_F1		(DAVINCI_LPSC_PSC1_BASE + 25)
+#define DAVINCI_LPSC_SCR_F2		(DAVINCI_LPSC_PSC1_BASE + 26)
+#define DAVINCI_LPSC_SCR_F6		(DAVINCI_LPSC_PSC1_BASE + 27)
+#define DAVINCI_LPSC_SCR_F7		(DAVINCI_LPSC_PSC1_BASE + 28)
+#define DAVINCI_LPSC_SCR_F8		(DAVINCI_LPSC_PSC1_BASE + 29)
+#define DAVINCI_LPSC_BR_F7		(DAVINCI_LPSC_PSC1_BASE + 30)
 
 #endif /* CONFIG_SOC_DA8XX */
 
-- 
Laurence Withers, <lwithers at guralp.com>                http://www.guralp.com/
Direct tel:+447753988197 or tel:+443333408643               Software Engineer
General support queries: <support at guralp.com>         CMG-DCM CMG-EAM CMG-NAM



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