[U-Boot] [PATCH v3 05/10] armv7: integrate cache maintenance support

[Wolfgang Denk]

Dear Aneesh V,

In message <4DD24BD6.5060608 at ti.com> you wrote:
> 
> > Would it be possible to do this even _before_ relocation, so to speed
> > up memory accesses during relocation?  Of course, proper invalidates/
> > flushes will be needed before jumping to the RAM address, but I guess
> > this would save a bit of boot times?
> 
> I intentionally kept it after  relocation to avoid un-necessary 
> complexities.

Yes, I can understand this.  Do you plean to extend this to include
relocation n a later step?

> Relocation is a case of self-modifying code. In Harvard architectures
> like armv7 there will be coherency issues unless we flush the entire
> D-cache(range based operation may be equally or more expensive) and
> invalidate the entire I-cache.

I would not call this self-modifying code.

Regarding the need to flush/invalidate caches when jumping to RAM:
yes, we have to flush the D-cache to make sure all data actually has
hit the memory. But there should be no need to invalidate the I-cache
as we have never been fetching any instructions from this address
range, so there cannot be any incorrect entries in cache.

Or am I missing something?

> So, in effect everything has to be flushed to memory before you jump to
> the new location. There may be a small advantage because flushing from
> cache allows for bursting to the DDR where as bursting is not possible
> when d-cache is disabled. But I think this is not worth the trouble.

Well, all the data copy will also use cached writes, which are much
faster.  I think this will result in measurable time differences.

Best regards,

Wolfgang Denk

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