[U-Boot] [PATCH 1/4] x86: Import code from coreboot's libpayload to parse the coreboot table
Gabe Black
gabeblack at chromium.org
Wed Nov 30 07:07:52 CET 2011
Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
arch/x86/cpu/coreboot/Makefile | 3 +
arch/x86/cpu/coreboot/ipchecksum.c | 54 ++++++
arch/x86/cpu/coreboot/sysinfo.c | 33 ++++
arch/x86/cpu/coreboot/tables.c | 183 +++++++++++++++++++
arch/x86/include/asm/ic/coreboot/ipchecksum.h | 37 ++++
arch/x86/include/asm/ic/coreboot/sysinfo.h | 64 +++++++
arch/x86/include/asm/ic/coreboot/tables.h | 241 +++++++++++++++++++++++++
board/chromebook-x86/coreboot/coreboot.c | 10 +
8 files changed, 625 insertions(+), 0 deletions(-)
create mode 100644 arch/x86/cpu/coreboot/ipchecksum.c
create mode 100644 arch/x86/cpu/coreboot/sysinfo.c
create mode 100644 arch/x86/cpu/coreboot/tables.c
create mode 100644 arch/x86/include/asm/ic/coreboot/ipchecksum.h
create mode 100644 arch/x86/include/asm/ic/coreboot/sysinfo.h
create mode 100644 arch/x86/include/asm/ic/coreboot/tables.h
diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
index 0444399..13f5f8a 100644
--- a/arch/x86/cpu/coreboot/Makefile
+++ b/arch/x86/cpu/coreboot/Makefile
@@ -33,7 +33,10 @@ include $(TOPDIR)/config.mk
LIB := $(obj)lib$(SOC).o
+COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
+COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
+COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
diff --git a/arch/x86/cpu/coreboot/ipchecksum.c b/arch/x86/cpu/coreboot/ipchecksum.c
new file mode 100644
index 0000000..63a3aab
--- /dev/null
+++ b/arch/x86/cpu/coreboot/ipchecksum.c
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * It has originally been taken from the FreeBSD project.
+ *
+ * Copyright (c) 2001 Charles Mott <cm at linktel.net>
+ * Copyright (c) 2008 coresystems GmbH
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <compiler.h>
+#include <asm/ic/coreboot/ipchecksum.h>
+
+unsigned short ipchksum(const void *vptr, unsigned long nbytes)
+{
+ int sum, oddbyte;
+ const unsigned short *ptr = vptr;
+
+ sum = 0;
+ while (nbytes > 1) {
+ sum += *ptr++;
+ nbytes -= 2;
+ }
+ if (nbytes == 1) {
+ oddbyte = 0;
+ ((u8 *)&oddbyte)[0] = *(u8 *) ptr;
+ ((u8 *)&oddbyte)[1] = 0;
+ sum += oddbyte;
+ }
+ sum = (sum >> 16) + (sum & 0xffff);
+ sum += (sum >> 16);
+ return ~sum;
+}
diff --git a/arch/x86/cpu/coreboot/sysinfo.c b/arch/x86/cpu/coreboot/sysinfo.c
new file mode 100644
index 0000000..464f8a1
--- /dev/null
+++ b/arch/x86/cpu/coreboot/sysinfo.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2009 coresystems GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <asm/ic/coreboot/sysinfo.h>
+
+struct sysinfo_t lib_sysinfo;
diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c
new file mode 100644
index 0000000..6c8b103
--- /dev/null
+++ b/arch/x86/cpu/coreboot/tables.c
@@ -0,0 +1,183 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2009 coresystems GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <asm/ic/coreboot/ipchecksum.h>
+#include <asm/ic/coreboot/sysinfo.h>
+#include <asm/ic/coreboot/tables.h>
+
+/*
+ * Some of this is x86 specific, and the rest of it is generic. Right now,
+ * since we only support x86, we'll avoid trying to make lots of infrastructure
+ * we don't need. If in the future, we want to use coreboot on some other
+ * architecture, then take out the generic parsing code and move it elsewhere.
+ */
+
+/* === Parsing code === */
+/* This is the generic parsing code. */
+
+static void cb_parse_memory(unsigned char *ptr, struct sysinfo_t *info)
+{
+ struct cb_memory *mem = (struct cb_memory *)ptr;
+ int count = MEM_RANGE_COUNT(mem);
+ int i;
+
+ if (count > SYSINFO_MAX_MEM_RANGES)
+ count = SYSINFO_MAX_MEM_RANGES;
+
+ info->n_memranges = 0;
+
+ for (i = 0; i < count; i++) {
+ struct cb_memory_range *range =
+ (struct cb_memory_range *)MEM_RANGE_PTR(mem, i);
+
+ info->memrange[info->n_memranges].base =
+ UNPACK_CB64(range->start);
+
+ info->memrange[info->n_memranges].size =
+ UNPACK_CB64(range->size);
+
+ info->memrange[info->n_memranges].type = range->type;
+
+ info->n_memranges++;
+ }
+}
+
+static void cb_parse_serial(unsigned char *ptr, struct sysinfo_t *info)
+{
+ struct cb_serial *ser = (struct cb_serial *)ptr;
+ if (ser->type != CB_SERIAL_TYPE_IO_MAPPED)
+ return;
+ info->ser_ioport = ser->baseaddr;
+}
+
+static void cb_parse_optiontable(unsigned char *ptr, struct sysinfo_t *info)
+{
+ info->option_table = (struct cb_cmos_option_table *)ptr;
+}
+
+static void cb_parse_checksum(unsigned char *ptr, struct sysinfo_t *info)
+{
+ struct cb_cmos_checksum *cmos_cksum = (struct cb_cmos_checksum *)ptr;
+ info->cmos_range_start = cmos_cksum->range_start;
+ info->cmos_range_end = cmos_cksum->range_end;
+ info->cmos_checksum_location = cmos_cksum->location;
+}
+
+static void cb_parse_framebuffer(unsigned char *ptr, struct sysinfo_t *info)
+{
+ info->framebuffer = (struct cb_framebuffer *)ptr;
+}
+
+static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
+{
+ struct cb_header *header;
+ unsigned char *ptr = (unsigned char *)addr;
+ int i;
+
+ for (i = 0; i < len; i += 16, ptr += 16) {
+ header = (struct cb_header *)ptr;
+ if (!strncmp((const char *)header->signature, "LBIO", 4))
+ break;
+ }
+
+ /* We walked the entire space and didn't find anything. */
+ if (i >= len)
+ return -1;
+
+ if (!header->table_bytes)
+ return 0;
+
+ /* Make sure the checksums match. */
+ if (ipchksum((u16 *) header, sizeof(*header)) != 0)
+ return -1;
+
+ if (ipchksum((u16 *) (ptr + sizeof(*header)),
+ header->table_bytes) != header->table_checksum)
+ return -1;
+
+ /* Now, walk the tables. */
+ ptr += header->header_bytes;
+
+ for (i = 0; i < header->table_entries; i++) {
+ struct cb_record *rec = (struct cb_record *)ptr;
+
+ /* We only care about a few tags here (maybe more later). */
+ switch (rec->tag) {
+ case CB_TAG_FORWARD:
+ return cb_parse_header(
+ (void *)(unsigned long)
+ ((struct cb_forward *)rec)->forward,
+ len, info);
+ continue;
+ case CB_TAG_MEMORY:
+ cb_parse_memory(ptr, info);
+ break;
+ case CB_TAG_SERIAL:
+ cb_parse_serial(ptr, info);
+ break;
+ case CB_TAG_CMOS_OPTION_TABLE:
+ cb_parse_optiontable(ptr, info);
+ break;
+ case CB_TAG_OPTION_CHECKSUM:
+ cb_parse_checksum(ptr, info);
+ break;
+ /*
+ * FIXME we should warn on serial if coreboot set up a
+ * framebuffer buf the payload does not know about it.
+ */
+ case CB_TAG_FRAMEBUFFER:
+ cb_parse_framebuffer(ptr, info);
+ break;
+ }
+
+ ptr += rec->size;
+ }
+
+ return 1;
+}
+
+/* == Architecture specific == */
+/* This is the x86 specific stuff. */
+
+/* Assume no translation or that memory is identity mapped. */
+static void *phys_to_virt(unsigned long virt)
+{
+ return (void *)(uintptr_t)virt;
+}
+
+int get_coreboot_info(struct sysinfo_t *info)
+{
+ int ret = cb_parse_header(phys_to_virt(0x00000000), 0x1000, info);
+
+ if (ret != 1)
+ ret = cb_parse_header(phys_to_virt(0x000f0000), 0x1000, info);
+
+ return (ret == 1) ? 0 : -1;
+}
diff --git a/arch/x86/include/asm/ic/coreboot/ipchecksum.h b/arch/x86/include/asm/ic/coreboot/ipchecksum.h
new file mode 100644
index 0000000..1d73b4d
--- /dev/null
+++ b/arch/x86/include/asm/ic/coreboot/ipchecksum.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * It has originally been taken from the FreeBSD project.
+ *
+ * Copyright (c) 2001 Charles Mott <cm at linktel.net>
+ * Copyright (c) 2008 coresystems GmbH
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _COREBOOT_IPCHECKSUM_H
+#define _COREBOOT_IPCHECKSUM_H
+
+unsigned short ipchksum(const void *vptr, unsigned long nbytes);
+
+#endif
diff --git a/arch/x86/include/asm/ic/coreboot/sysinfo.h b/arch/x86/include/asm/ic/coreboot/sysinfo.h
new file mode 100644
index 0000000..612342b
--- /dev/null
+++ b/arch/x86/include/asm/ic/coreboot/sysinfo.h
@@ -0,0 +1,64 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _COREBOOT_SYSINFO_H
+#define _COREBOOT_SYSINFO_H
+
+#include <compiler.h>
+
+/* Allow a maximum of 16 memory range definitions. */
+#define SYSINFO_MAX_MEM_RANGES 16
+
+struct sysinfo_t {
+ unsigned int cpu_khz;
+ unsigned short ser_ioport;
+ unsigned long ser_base; /* for mmapped serial */
+
+ int n_memranges;
+
+ struct memrange {
+ unsigned long long base;
+ unsigned long long size;
+ unsigned int type;
+ } memrange[SYSINFO_MAX_MEM_RANGES];
+
+ struct cb_cmos_option_table *option_table;
+ u32 cmos_range_start;
+ u32 cmos_range_end;
+ u32 cmos_checksum_location;
+
+ struct cb_framebuffer *framebuffer;
+
+ unsigned long *mbtable; /** Pointer to the multiboot table */
+};
+
+extern struct sysinfo_t lib_sysinfo;
+
+#endif
+
diff --git a/arch/x86/include/asm/ic/coreboot/tables.h b/arch/x86/include/asm/ic/coreboot/tables.h
new file mode 100644
index 0000000..c286973
--- /dev/null
+++ b/arch/x86/include/asm/ic/coreboot/tables.h
@@ -0,0 +1,241 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _COREBOOT_TABLES_H
+#define _COREBOOT_TABLES_H
+
+#include <compiler.h>
+
+struct cbuint64 {
+ u32 lo;
+ u32 hi;
+};
+
+struct cb_header {
+ u8 signature[4];
+ u32 header_bytes;
+ u32 header_checksum;
+ u32 table_bytes;
+ u32 table_checksum;
+ u32 table_entries;
+};
+
+struct cb_record {
+ u32 tag;
+ u32 size;
+};
+
+#define CB_TAG_UNUSED 0x0000
+#define CB_TAG_MEMORY 0x0001
+
+struct cb_memory_range {
+ struct cbuint64 start;
+ struct cbuint64 size;
+ u32 type;
+};
+
+#define CB_MEM_RAM 1
+#define CB_MEM_RESERVED 2
+#define CB_MEM_ACPI 3
+#define CB_MEM_NVS 4
+#define CB_MEM_UNUSABLE 5
+#define CB_MEM_VENDOR_RSVD 6
+#define CB_MEM_TABLE 16
+
+struct cb_memory {
+ u32 tag;
+ u32 size;
+ struct cb_memory_range map[0];
+};
+
+#define CB_TAG_HWRPB 0x0002
+
+struct cb_hwrpb {
+ u32 tag;
+ u32 size;
+ u64 hwrpb;
+};
+
+#define CB_TAG_MAINBOARD 0x0003
+
+struct cb_mainboard {
+ u32 tag;
+ u32 size;
+ u8 vendor_idx;
+ u8 part_number_idx;
+ u8 strings[0];
+};
+
+#define CB_TAG_VERSION 0x0004
+#define CB_TAG_EXTRA_VERSION 0x0005
+#define CB_TAG_BUILD 0x0006
+#define CB_TAG_COMPILE_TIME 0x0007
+#define CB_TAG_COMPILE_BY 0x0008
+#define CB_TAG_COMPILE_HOST 0x0009
+#define CB_TAG_COMPILE_DOMAIN 0x000a
+#define CB_TAG_COMPILER 0x000b
+#define CB_TAG_LINKER 0x000c
+#define CB_TAG_ASSEMBLER 0x000d
+
+struct cb_string {
+ u32 tag;
+ u32 size;
+ u8 string[0];
+};
+
+#define CB_TAG_SERIAL 0x000f
+
+struct cb_serial {
+ u32 tag;
+ u32 size;
+#define CB_SERIAL_TYPE_IO_MAPPED 1
+#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
+ u32 type;
+ u32 baseaddr;
+ u32 baud;
+};
+
+#define CB_TAG_CONSOLE 0x00010
+
+struct cb_console {
+ u32 tag;
+ u32 size;
+ u16 type;
+};
+
+#define CB_TAG_CONSOLE_SERIAL8250 0
+#define CB_TAG_CONSOLE_VGA 1 /* OBSOLETE */
+#define CB_TAG_CONSOLE_BTEXT 2 /* OBSOLETE */
+#define CB_TAG_CONSOLE_LOGBUF 3
+#define CB_TAG_CONSOLE_SROM 4 /* OBSOLETE */
+#define CB_TAG_CONSOLE_EHCI 5
+
+#define CB_TAG_FORWARD 0x00011
+
+struct cb_forward {
+ u32 tag;
+ u32 size;
+ u64 forward;
+};
+
+#define CB_TAG_FRAMEBUFFER 0x0012
+struct cb_framebuffer {
+ u32 tag;
+ u32 size;
+
+ u64 physical_address;
+ u32 x_resolution;
+ u32 y_resolution;
+ u32 bytes_per_line;
+ u8 bits_per_pixel;
+ u8 red_mask_pos;
+ u8 red_mask_size;
+ u8 green_mask_pos;
+ u8 green_mask_size;
+ u8 blue_mask_pos;
+ u8 blue_mask_size;
+ u8 reserved_mask_pos;
+ u8 reserved_mask_size;
+};
+
+#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
+struct cb_cmos_option_table {
+ u32 tag;
+ u32 size;
+ u32 header_length;
+};
+
+#define CB_TAG_OPTION 0x00c9
+#define CMOS_MAX_NAME_LENGTH 32
+struct cb_cmos_entries {
+ u32 tag;
+ u32 size;
+ u32 bit;
+ u32 length;
+ u32 config;
+ u32 config_id;
+ u8 name[CMOS_MAX_NAME_LENGTH];
+};
+
+
+#define CB_TAG_OPTION_ENUM 0x00ca
+#define CMOS_MAX_TEXT_LENGTH 32
+struct cb_cmos_enums {
+ u32 tag;
+ u32 size;
+ u32 config_id;
+ u32 value;
+ u8 text[CMOS_MAX_TEXT_LENGTH];
+};
+
+#define CB_TAG_OPTION_DEFAULTS 0x00cb
+#define CMOS_IMAGE_BUFFER_SIZE 128
+struct cb_cmos_defaults {
+ u32 tag;
+ u32 size;
+ u32 name_length;
+ u8 name[CMOS_MAX_NAME_LENGTH];
+ u8 default_set[CMOS_IMAGE_BUFFER_SIZE];
+};
+
+#define CB_TAG_OPTION_CHECKSUM 0x00cc
+#define CHECKSUM_NONE 0
+#define CHECKSUM_PCBIOS 1
+struct cb_cmos_checksum {
+ u32 tag;
+ u32 size;
+ u32 range_start;
+ u32 range_end;
+ u32 location;
+ u32 type;
+};
+
+/* Helpful macros */
+
+#define MEM_RANGE_COUNT(_rec) \
+ (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
+
+#define MEM_RANGE_PTR(_rec, _idx) \
+ (((u8 *) (_rec)) + sizeof(*(_rec)) \
+ + (sizeof((_rec)->map[0]) * (_idx)))
+
+#define MB_VENDOR_STRING(_mb) \
+ (((unsigned char *) ((_mb)->strings)) + (_mb)->vendor_idx)
+
+#define MB_PART_STRING(_mb) \
+ (((unsigned char *) ((_mb)->strings)) + (_mb)->part_number_idx)
+
+#define UNPACK_CB64(_in) \
+ ((((u64) _in.hi) << 32) | _in.lo)
+
+struct sysinfo_t;
+
+int get_coreboot_info(struct sysinfo_t *info);
+
+#endif
diff --git a/board/chromebook-x86/coreboot/coreboot.c b/board/chromebook-x86/coreboot/coreboot.c
index 44c6f15..a2d6ef5 100644
--- a/board/chromebook-x86/coreboot/coreboot.c
+++ b/board/chromebook-x86/coreboot/coreboot.c
@@ -26,6 +26,8 @@
#include <asm/u-boot-x86.h>
#include <flash.h>
#include <netdev.h>
+#include <asm/ic/coreboot/tables.h>
+#include <asm/ic/coreboot/sysinfo.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -34,6 +36,14 @@ unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
/*
* Miscellaneous platform dependent initializations
*/
+int cpu_init_f(void)
+{
+ int ret = get_coreboot_info(&lib_sysinfo);
+ if (ret != 0)
+ printf("Failed to parse coreboot tables.\n");
+ return ret;
+}
+
int board_early_init_f(void)
{
return 0;
--
1.7.3.1
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