[U-Boot] [PATCH] i.MX28: Make the stabilization delays shorter

[Marek Vasut]

Cut down the VDDIO/VDDA regulator stabilization delays to 500 uS. That should be
enough according to the datasheet and bootlets.

Signed-off-by: Marek Vasut <marek.vasut at gmail.com>
Cc: Wolfgang Denk <wd at denx.de>
Cc: Detlev Zundel <dzu at denx.de>
Cc: Stefano Babic <sbabic at denx.de>
Cc: Robert Deliën <robert at delien.nl>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Matthias Fuchs <matthias.fuchs at esd.eu>
---
 arch/arm/cpu/arm926ejs/mx28/spl_power_init.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index c6c25d9..4b09b0c 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -805,7 +805,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))
@@ -842,7 +842,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))
@@ -902,7 +902,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))
@@ -939,7 +939,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))
-- 
1.7.8.3