[U-Boot] [PATCH v3 4/4] c6x: Add support c6745-som board

Dmitry Bondar bond at inmys.ru
Mon Jun 25 20:02:41 CEST 2012


Add support board c6745-som (http://inmys.ru/?_=/products/som_c6745) with C6745 cpu.

Signed-off-by: Dmitry Bondar <bond at inmys.ru>
Cc: Tom Rini <trini at ti.com>
---
 MAINTAINERS                       |    3 +
 board/inmys/c6745-som/Makefile    |   27 ++++
 board/inmys/c6745-som/c6745-som.c |  246 +++++++++++++++++++++++++++++++
 boards.cfg                        |    1 +
 include/configs/c6745-som-inmys.h |  294 +++++++++++++++++++++++++++++++++++++
 5 files changed, 571 insertions(+), 0 deletions(-)
 create mode 100644 board/inmys/c6745-som/Makefile
 create mode 100644 board/inmys/c6745-som/c6745-som.c
 create mode 100644 include/configs/c6745-som-inmys.h

diff --git a/MAINTAINERS b/MAINTAINERS
index e55893b..710f3df 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -62,6 +62,9 @@ Jerry Van Baren <gerald.vanbaren at smiths-aerospace.com>
 
 	sacsng		MPC8260
 
+Dmitry Bondar <bond at inmys.ru>
+	c6745-som	c674x
+
 Oliver Brown <obrown at adventnetworks.com>
 
 	gw8260		MPC8260
diff --git a/board/inmys/c6745-som/Makefile b/board/inmys/c6745-som/Makefile
new file mode 100644
index 0000000..9a91ed2
--- /dev/null
+++ b/board/inmys/c6745-som/Makefile
@@ -0,0 +1,27 @@
+# (C) Copyright 2012  Dmitry Bondar <bond at inmys.ru>
+#
+# This file is released under the terms of GPL v2 and any later version.
+# See the file COPYING in the root directory of the source tree for details.
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS-$(CONFIG_MACH_INMYS_C6745_SOM)	+= c6745-som.o
+
+COBJS   := $(COBJS-y)
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/inmys/c6745-som/c6745-som.c b/board/inmys/c6745-som/c6745-som.c
new file mode 100644
index 0000000..d71ac2b
--- /dev/null
+++ b/board/inmys/c6745-som/c6745-som.c
@@ -0,0 +1,246 @@
+/*
+ * (C) Copyright 2012  Dmitry Bondar <bond at inmys.ru>
+ * From da830. Original Notices follow:
+ *
+ * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson at gefanuc.com>
+ *
+ * Base on code from TI. Original Notices follow:
+ *
+ * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
+ *
+ * Modified for DA8xx EVM.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi at koi8.net>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ * -----------------------------------------------------------------
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <net.h>
+#include <netdev.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emif_defs.h>
+#include <asm/arch/emac_defs.h>
+#include <asm/io.h>
+#include <asm/arch/davinci_misc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])
+
+/* SPI0 pin muxer settings */
+static const struct pinmux_config spi0_pins[] = {
+	{ pinmux(7), 1, 3 },
+	{ pinmux(7), 1, 4 },
+	{ pinmux(7), 1, 5 },
+	{ pinmux(7), 1, 6 },
+	{ pinmux(7), 1, 7 }
+};
+
+/* EMIF-A bus pins for 8-bit NAND support on CS3 */
+static const struct pinmux_config emifa_nand_pins[] = {
+	{ pinmux(13), 1, 6 },
+	{ pinmux(13), 1, 7 },
+	{ pinmux(14), 1, 0 },
+	{ pinmux(14), 1, 1 },
+	{ pinmux(14), 1, 2 },
+	{ pinmux(14), 1, 3 },
+	{ pinmux(14), 1, 4 },
+	{ pinmux(14), 1, 5 },
+	{ pinmux(15), 1, 7 },
+	{ pinmux(16), 1, 0 },
+	{ pinmux(18), 1, 1 },
+	{ pinmux(18), 1, 4 },
+	{ pinmux(18), 1, 5 },
+};
+
+/* EMAC PHY interface pins */
+static const struct pinmux_config emac_pins[] = {
+	{ pinmux(9), 0, 5 },
+	{ pinmux(10), 2, 1 },
+	{ pinmux(10), 2, 2 },
+	{ pinmux(10), 2, 3 },
+	{ pinmux(10), 2, 4 },
+	{ pinmux(10), 2, 5 },
+	{ pinmux(10), 2, 6 },
+	{ pinmux(10), 2, 7 },
+	{ pinmux(11), 2, 0 },
+	{ pinmux(11), 2, 1 },
+};
+
+/* UART pin muxer settings */
+static const struct pinmux_config uart_pins[] = {
+	{ pinmux(8), 2, 7 },
+	{ pinmux(9), 2, 0 }
+};
+
+/* I2C pin muxer settings */
+static const struct pinmux_config i2c_pins[] = {
+	{ pinmux(8), 2, 3 },
+	{ pinmux(8), 2, 4 }
+};
+
+/* USB0_DRVVBUS pin muxer settings */
+static const struct pinmux_config usb_pins[] = {
+	{ pinmux(9), 1, 1 }
+};
+
+static const struct pinmux_resource pinmuxes[] = {
+#ifdef CONFIG_SPI_FLASH
+	PINMUX_ITEM(spi0_pins),
+#endif
+	PINMUX_ITEM(uart_pins),
+	PINMUX_ITEM(i2c_pins),
+#ifdef CONFIG_USB_DA8XX
+	PINMUX_ITEM(usb_pins),
+#endif
+#ifdef CONFIG_USE_NAND
+	PINMUX_ITEM(emifa_nand_pins),
+#endif
+#if defined(CONFIG_DRIVER_TI_EMAC)
+	PINMUX_ITEM(emac_pins),
+#endif
+};
+
+static const struct lpsc_resource lpsc[] = {
+	{ DAVINCI_LPSC_AEMIF },	/* NAND, NOR */
+	{ DAVINCI_LPSC_SPI0 },	/* Serial Flash */
+	{ DAVINCI_LPSC_EMAC },	/* image download */
+	{ DAVINCI_LPSC_UART2 },	/* console */
+	{ DAVINCI_LPSC_GPIO },
+};
+
+int board_early_init_f(void)
+{
+#ifndef CONFIG_USE_IRQ
+	irq_init();
+#endif
+
+#ifdef CONFIG_NAND_DAVINCI
+	/* EMIFA 100MHz clock select */
+	writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
+	       &davinci_syscfg_regs->cfgchip3);
+	/* NAND CS setup */
+	writel((DAVINCI_ABCR_WSETUP(0) |
+		DAVINCI_ABCR_WSTROBE(2) |
+		DAVINCI_ABCR_WHOLD(0) |
+		DAVINCI_ABCR_RSETUP(0) |
+		DAVINCI_ABCR_RSTROBE(2) |
+		DAVINCI_ABCR_RHOLD(0) |
+		DAVINCI_ABCR_TA(2) |
+		DAVINCI_ABCR_ASIZE_8BIT),
+	       &davinci_emif_regs->ab2cr);
+#endif
+
+	/* arch number of the board */
+	/*gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;*/
+	gd->bd->bi_arch_number = 0;
+
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+	/*
+	 * Power on required peripherals
+	 * ARM does not have access by default to PSC0 and PSC1
+	 * assuming here that the DSP bootloader has set the IOPU
+	 * such that PSC access is available to ARM
+	 */
+	if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
+		return 1;
+
+	/* setup the SUSPSRC for ARM to control emulation suspend */
+	writel(readl(&davinci_syscfg_regs->suspsrc) &
+	       ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
+		 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
+		 DAVINCI_SYSCFG_SUSPSRC_UART2),
+	       &davinci_syscfg_regs->suspsrc);
+
+#if 1
+	/* configure pinmux settings */
+	if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
+		return 1;
+#endif
+	/*
+	* If we boot over UART, Terminal doesn't display characters
+	* Reset the values set by Boot ROM
+	*/
+#if 1
+	{
+		int j;
+		for (j = 0; j < 15; j++)
+			REG(DAVINCI_UART2_BASE + (j*4)) = 0;
+	}
+	REG(DAVINCI_UART2_BASE + 0x30) = 1 | (1 << 13) | (1 << 14);
+#endif
+	/* enable the console UART */
+	writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
+		DAVINCI_UART_PWREMU_MGMT_UTRST),
+	       &davinci_uart2_ctrl_regs->pwremu_mgmt);
+
+	return 0;
+}
+
+int board_init()
+{
+	return 0;
+}
+
+
+#if defined(CONFIG_DRIVER_TI_EMAC)
+
+#define PHY_SW_I2C_ADDR	0x57 /* Address of PHY on i2c bus */
+
+/*
+ * Initializes on-board ethernet controllers.
+ */
+int board_eth_init(bd_t *bis)
+{
+	u_int8_t mac_addr[6];
+	struct eth_device *dev;
+
+	/* Read Ethernet MAC address from EEPROM */
+	if (dvevm_read_mac_address(mac_addr))
+		/* set address env if not already set */
+		davinci_sync_env_enetaddr(mac_addr);
+
+	/* read the address back from env */
+	if (!eth_getenv_enetaddr("ethaddr", mac_addr))
+		return -1;
+
+	/* finally, initialise the driver */
+	if (!davinci_emac_initialize()) {
+		printf("Error: Ethernet init failed!\n");
+		return -1;
+	}
+
+	dev = eth_get_dev();
+
+	/* provide the resulting addr to the driver */
+	memcpy(dev->enetaddr, mac_addr, 6);
+	dev->write_hwaddr(dev);
+
+	return 0;
+}
+#endif /* CONFIG_DRIVER_TI_EMAC */
+
diff --git a/boards.cfg b/boards.cfg
index a723f67..7acbfd1 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -302,6 +302,7 @@ ip04                         blackfin    blackfin
 pr1                          blackfin    blackfin
 tcm-bf518                    blackfin    blackfin
 tcm-bf537                    blackfin    blackfin
+c6745-som-inmys              c6x         c674x       c6745-som           inmys          davinci     c6745-som-inmys
 M52277EVB                    m68k        mcf5227x    m52277evb           freescale      -           M52277EVB:SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000
 M52277EVB_stmicro            m68k        mcf5227x    m52277evb           freescale      -           M52277EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x43E00000
 M5235EVB                     m68k        mcf523x     m5235evb            freescale      -           M5235EVB:SYS_TEXT_BASE=0xFFE00000
diff --git a/include/configs/c6745-som-inmys.h b/include/configs/c6745-som-inmys.h
new file mode 100644
index 0000000..7c8d567
--- /dev/null
+++ b/include/configs/c6745-som-inmys.h
@@ -0,0 +1,294 @@
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* Based on da830evm.h
+*/
+#define TMPVAL 0
+
+/*
+ * Board
+ */
+#define CONFIG_USE_NAND
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_CMD_GPIO
+#define CONFIG_DA8XX_GPIO
+/*#define CONFIG_DISPLAY_CPUINFO*/
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#if 0
+#define CONFIG_USE_SPIFLASH
+#endif
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MACH_INMYS_C6745_SOM
+#define CONFIG_C6X			/* */
+#define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
+#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
+#define CONFIG_SYS_OSCIN_FREQ		24000000
+#define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
+#define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE            0xc1f80000
+#define CONFIG_BOARD_EARLY_INIT_F
+
+
+/*
+ * Memory Info
+ */
+#define CONFIG_SYS_MALLOC_LEN	(0x10000 + 1*1024*1024) /* malloc() len */
+#define PHYS_SDRAM_1			0xc0000000 /* SDRAM Start */
+#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))
+#define CONFIG_SYS_SDRAM_SIZE (32*1024*1024)
+#define CONFIG_NR_DRAM_BANKS	1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE	(256*1024) /* regular stack */
+
+/*
+ * Memory organisation:
+ *
+ * RAM start ---------------------------
+ *           | ...                     |
+ *           ---------------------------
+ *           | Stack                   |
+ *           ---------------------------
+ *           | Global data             |
+ *           ---------------------------
+ *           | Environment             |
+ *           ---------------------------
+ *           | Monitor                 |
+ * RAM end   ---------------------------
+ */
+/* We're running in RAM */
+#define CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_SYS_MONITOR_LEN  0x80000 /* Reserve 512k */
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \
+				CONFIG_SYS_SDRAM_SIZE - \
+				CONFIG_SYS_MONITOR_LEN)
+
+#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_MONITOR_BASE - \
+				GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_ADDR        CONFIG_SYS_GBL_DATA_OFFSET
+#define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_GBL_DATA_OFFSET
+#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
+#define CONFIG_SYS_MALLOC_BASE          (CONFIG_SYS_INIT_SP_OFFSET \
+				- CONFIG_STACKSIZE \
+				- CONFIG_SYS_MALLOC_LEN)
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size */
+#define CONFIG_SYS_NS16550_COM1	DAVINCI_UART2_BASE /* Base address of UART2 */
+#define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+#if 1
+/*
+ * I2C Configuration
+ */
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CONFIG_SYS_I2C_SPEED		25000 /* 100Kbps won't work, H/W bug */
+#define CONFIG_SYS_I2C_SLAVE		10 /* Bogus, master-only in U-Boot */
+
+
+#define CONFIG_CMD_I2C
+
+#define CONFIG_CMD_DATE
+#define CONFIG_RTC_PCF8563
+#define CONFIG_SYS_I2C_RTC_ADDR        0x51
+
+#define CONFIG_CMD_EEPROM
+/* EEPROM configuration */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
+#define CONFIG_SYS_EEPROM_SIZE          256
+#define CONFIG_SYS_I2C_EEPROM_ADDR      0x57
+
+#endif
+
+/*
+ * Network & Ethernet Configuration
+ */
+#ifdef CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM	1
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT	10
+#endif
+
+
+/*
+ * Flash & Environment
+ */
+#undef CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
+#define CONFIG_ENV_OFFSET		0
+#define CONFIG_ENV_SIZE			(128*1024)
+#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#define CONFIG_SYS_NAND_CS		3
+#define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
+#define CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
+#define CONFIG_SYS_CLE_MASK		0x10
+#define CONFIG_SYS_ALE_MASK		0x8
+#define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS			1
+
+#if 1
+/*
+ * USB configuration
+ */
+#define CONFIG_USB_DA8XX	/* Platform hookup to MUSB controller */
+#define CONFIG_MUSB_HCD
+
+#endif
+
+/*
+ * U-Boot general configuration
+ */
+#undef CONFIG_USE_IRQ			/* No IRQ/FIQ in U-Boot */
+#undef CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE		"uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT	"c6745-som > " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS	16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR	(PHYS_SDRAM_1 + 0x700000)
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE	/* Won't work with hush so far, may be later */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/*
+ * Linux Information
+ */
+#define LINUX_BOOT_PARAM_ADDR	(PHYS_SDRAM_1 + 0x100)
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS		"mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND	""
+#define CONFIG_BOOTDELAY	3
+
+/*
+ * U-Boot commands
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_ASKENV
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_MEMORY
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+
+#ifndef CONFIG_DRIVER_TI_EMAC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PING
+#endif
+
+#ifdef CONFIG_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_MTD_DEVICE
+#endif
+
+#ifdef CONFIG_USE_SPIFLASH
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SAVEENV
+#endif
+
+#if !defined(CONFIG_USE_NAND) && \
+	!defined(CONFIG_USE_NOR) && \
+	!defined(CONFIG_USE_SPIFLASH)
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_SIZE		(16 << 10)
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_ENV
+#endif
+
+#ifdef CONFIG_USB_DA8XX
+
+#ifdef CONFIG_MUSB_HCD		/* include support for usb host */
+#define CONFIG_CMD_USB		/* include support for usb cmd */
+
+#define CONFIG_USB_STORAGE	/* MSC class support */
+#define CONFIG_CMD_STORAGE	/* inclue support for usb-storage cmd */
+#define CONFIG_CMD_FAT		/* inclue support for FAT/storage */
+#define CONFIG_DOS_PARTITION	/* inclue support for FAT/storage */
+
+#ifdef CONFIG_USB_KEYBOARD	/* HID class support */
+#define CONFIG_SYS_USB_EVENT_POLL
+#define CONFIG_PREBOOT "usb start"
+#endif /* CONFIG_USB_KEYBOARD */
+
+#endif /* CONFIG_MUSB_HCD */
+
+#ifdef CONFIG_MUSB_UDC
+/* USB device configuration */
+#define CONFIG_USB_DEVICE		1
+#define CONFIG_USB_TTY			1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
+/* Change these to suit your needs */
+#define CONFIG_USBD_VENDORID		0x0451
+#define CONFIG_USBD_PRODUCTID		0x5678
+#define CONFIG_USBD_MANUFACTURER	"InMys"
+#define CONFIG_USBD_PRODUCT_NAME	"c6745-som"
+#endif /* CONFIG_MUSB_UDC */
+
+#endif /* CONFIG_USB_DA8XX */
+
+#ifdef CONFIG_MTD_PARTITIONS
+#define MTDIDS_DEFAULT		"nand0=davinci_nand.1"
+#define PART_BOOT		"512k(bootloader)ro,"
+#define PART_PARAMS		"512k(params)ro,"
+#define PART_KERNEL		"4m(kernel),"
+#define PART_REST		"-(filesystem)"
+#define MTDPARTS_DEFAULT        \
+	"mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST
+#endif
+
+#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
+
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_BOOTD
+#undef CONFIG_RESET_TO_RETRY
+
+#define CONFIG_STANDALONE_LOAD_ADDR 0xc1f80000
+
+#endif /* __CONFIG_H */
-- 
1.7.2.5



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