[U-Boot] [PATCH 2/9] CACHE: Add cache_aligned() macro

Scott Wood scottwood at freescale.com
Mon Jun 25 23:12:13 CEST 2012


On 06/24/2012 07:17 PM, Marek Vasut wrote:
> This macro returns 1 if the argument (address) is aligned, returns
> zero otherwise. This will be used to test user-supplied address to
> various commands to prevent user from loading data to/from unaligned
> address when using caches.
> 
> This is made as a macro, because macros are expanded where they are
> used. Therefore it can be easily instrumented to report position of
> the fault.
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Wolfgang Denk <wd at denx.de>
> ---
>  include/common.h |   18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/include/common.h b/include/common.h
> index 322569e..17c64b0 100644
> --- a/include/common.h
> +++ b/include/common.h
> @@ -730,6 +730,24 @@ void	invalidate_dcache_range(unsigned long start, unsigned long stop);
>  void	invalidate_dcache_all(void);
>  void	invalidate_icache_all(void);
>  
> +/* Test if address is cache-aligned. Returns 0 if it is, 1 otherwise. */
> +#define cacheline_aligned(addr)						\
> +	({								\
> +	int __ret;							\
> +	if (!dcache_status()) {						\
> +		__ret = 1;						\
> +	} else if ((addr) & (ARCH_DMA_MINALIGN - 1)) {			\
> +		puts("Align load address to "				\
> +			__stringify(ARCH_DMA_MINALIGN)			\
> +			" bytes when using caches!\n");			\
> +		__ret = 0;						\
> +	} else {							\
> +		__ret = 1;						\
> +	}								\
> +	__ret;								\
> +	})

What if it's a store rather than a load?  If this is only supposed to be
used for loads (because on a store you can flush the cache rather than
invalidate), it's not labelled that way, the changelog says "to/from
unaligned address", and the caller might be common code that doesn't
know which direction the transfer is in.  Besides, it would be awkward
user interface to allow an address to be used in one direction but not
the other.

What if the caller wants to try a different strategy if this returns 0,
rather than print an error?

Why should the success of a command depend on whether caches are
enabled?  If we're going to forbid unaligned addresses in certain
contexts, shouldn't it always be forbidden to ensure consistent user
experience?  Or if we're going to be picky about when we reject it, why
don't we care whether the device in question does DMA, and whether that
DMA is coherent?

-Scott



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