[U-Boot] [PATCH 5/7] OMAP5: EMIF: Add support for DDR3 device

R, Sricharan r.sricharan at ti.com
Tue May 22 16:58:55 CEST 2012


Hi Tom,
>> In OMAP5432 EMIF controlller supports DDR3 device.
>> This patch adds support for ddr3 device intialization and configuration.
>> Initialization sequence is done as specified in JEDEC specs.
>> This also adds support for ddr3 leveling.
> [snip]
>> @@ -975,8 +1070,12 @@ static void do_sdram_init(u32 base)
>>        * Changing the timing registers in EMIF can happen(going from one
>>        * OPP to another)
>>        */
>> -     if (!in_sdram)
>> -             lpddr2_init(base, regs);
>> +     if (!in_sdram) {
>> +             if (omap_revision() != OMAP5432_ES1_0)
>> +                     lpddr2_init(base, regs);
>> +             else
>> +                     ddr3_init(base, regs);
>> +     }
>
> In omap4+ land do we have any other way of telling which family we're
> on?  I ask since I'm preparing to add DDR3 support to am33xx and I'd
> like to switch it over to the common emif framework as well.
>
  I think the SDRAM_TYPE[31:29] EMIF_SDRAM_CONFIG
 register should tell the connected device at reset.
 I will cross confirm this on the board and tell.

 That being true, we can get rid of these OMAP based
 checks and have generic code.

Thanks,
 Sricharan


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