[U-Boot] [u-boot] Adding missing CONFIG_SYS_CACHELINE_SIZE to boards definitions

[Albert ARIBAUD]

Hi esw,

(resending as it was erroneously posted on gmane; sorry for any dupes)

On Thu, 4 Oct 2012 10:28:48 +0200, esw <esw at bus-elektronik.de> wrote:

> Dear Lukasz,
> 
> > Hi Jens and Helmut,
> > 
> >> On Thu, Aug 23, 2012 at 10:13:13PM -0000, Lukasz Majewski wrote:
> >>
> >>> The restoration of GPT table (both primary and secondary) is now
> >>> possible. Simple GUID generation is supported.
> >>>
> >>> Signed-off-by: Lukasz Majewski <l.majewski at samsung.com>
> >>> Signed-off-by: Kyungmin Park <kyungmin.park at samsung.com>
> >>
> >> While the changes are fine, tt01 and eb_cpux9k2 use CONFIG_PART_EFI
> >> and do not set CONFIG_SYS_CACHELINE_SIZE and so fail to build after
> >> this patch.  tt01 is easily fixable (it relies on a non-exported
> >> define elsewhere to 32) but the eb_cpu9k2 please contact the listed
> >> board maintainer to get the define added.
> >>
> > 
> > Would it be possible to add the CONFIG_SYS_CACHELINE_SIZE
> > definition to ./include/configs/{tty01|eb_cpux9k2} boards definition?
> > 
> The eb_cpux9k2 board based on at91rm9200 soc. This soc has currently no cache implementation. So I think your run in this error.
> 
> The attached patch sets the define to the soc default.
> 
> We can also set #define CONFIG_SYS_DCACHE_OFF
> 
> regards Jens

If this is to be considered an actual patch submission, then please
submit via git format-patch/git send-email or patman, and copy the at91
custodian. This patch has been marked as "changes requested" in PW.

Amicalement,
-- 
Albert.