[U-Boot] [PATCH v4 0/6] tegra: Add NAND flash support

Simon Glass sjg at chromium.org
Fri Sep 7 23:33:12 CEST 2012


Hi Tom,

On Fri, Sep 7, 2012 at 2:31 PM, Tom Warren <TWarren at nvidia.com> wrote:
> Simon,
>
>> -----Original Message-----
>> From: Simon Glass [mailto:sjg at chromium.org]
>> Sent: Sunday, July 29, 2012 11:53 PM
>> To: U-Boot Mailing List
>> Cc: Tom Warren; Stephen Warren; Scott Wood; Simon Glass
>> Subject: [PATCH v4 0/6] tegra: Add NAND flash support
>>
>> This series adds NAND flash support to Tegra and enables it on Seaboard.
>
> Applied to u-boot-tegra/next, thanks. The fix for the m28evk and apx4devkit builds (moving common.h to the top in mxs_nand.c) can come from you or Marek, and I'll add it to /next later. But for now, all tegra20 boards build fine.

OK thanks.

With LCD I had a few comments, but the main question is with the
bindings. Can we get a resolution there?

Regards,
Simon

>
> Tom
>
>>
>> Included here is a proposed device tree binding with most of the properties
>> private to "nvidia,". The binding includes information about the NAND
>> controller as well as the connected NAND device. The Seaboard has a Hynix
>> HY27UF4G2B.
>>
>> The driver supports ECC-based access and uses DMA and NAND acceleration
>> features of the Tegra SOC to provide access at reasonable speed.
>>
>> Changes in v2:
>> - Add new patch to align default buffers in nand_base
>> - Added comment about the behaviour of the 'resp' register
>> - Call set_bus_width_page_size() at init to report errors earlier
>> - Change set_bus_width_page_size() to return an error when needed
>> - Change timing structure member to u32 to match device tree
>> - Check for supported bus width in board_nand_init()
>> - Fix tegra nand header file to remove BIT defines
>> - Implement a dummy nand_select_chip() instead of nand_hwcontro()
>> - Make nand_command() display an error on an unknown command
>> - Minor code tidy-ups in driver for style
>> - Move cache logic into a separate dma_prepare() function
>> - Remove CMD_TRANS_SIZE_BYTESx enum
>> - Remove space after casts
>> - Remove use of 'register' variables
>> - Rename struct nand_info to struct nand_drv to avoid nand_info_t confusion
>> - Support 4096 byte page devices, drop 1024 and 2048
>> - Tidy up nand_waitfor_cmd_completion() logic
>> - Update NAND binding to add "nvidia," prefix
>> - Use s32 for device tree integer values
>>
>> Changes in v3:
>> - Add reg property for unit address (should be used for chip select)
>> - Change note in fdt binding about the need for a hardware-specific binding
>> - Fix up typos in fdt binding, and rename the file
>> - Update fdt binding to make everything Nvidia-specific
>>
>> Changes in v4:
>> - Align buffer length to cache line size in dma_prepare()
>> - Fix "Write Page 0x0 timeout with ECC" error on 4.4.1
>> - Fix the issue that read_byte can read at most 4 times
>> - Get some information from Read ID data instead of from device tree
>> - In nand_command, set NAND_CMD_RNDOUT as unsupported command
>> - Modify eccoob layout
>> - Move to using CONFIG_SYS_NAND_SELF_INIT
>> - Remove "DEFAULT" from comment because that function is not default
>> - Remove fdt bindings related to page structure
>> - Remove local read_buf and write_buf functions
>> - Remove some fields in fdt_nand structure
>> - Rename CONFIG_TEGRA2_NAND to CONFIG_TEGRA_NAND
>> - Rename variables my_* as our_*
>> - Use virt_to_phys() when filling address register
>>
>> Jim Lin (1):
>>   tegra: nand: Add Tegra NAND driver
>>
>> Simon Glass (5):
>>   nand: Try to align the default buffers
>>   tegra: Add NAND support to funcmux
>>   tegra: fdt: Add NAND controller binding and definitions
>>   tegra: fdt: Add NAND definitions to fdt
>>   tegra: Enable NAND on Seaboard
>>
>>  arch/arm/cpu/tegra20-common/funcmux.c              |    7 +
>>  arch/arm/dts/tegra20.dtsi                          |    7 +
>>  arch/arm/include/asm/arch-tegra20/funcmux.h        |    3 +
>>  arch/arm/include/asm/arch-tegra20/tegra20.h        |    1 +
>>  board/nvidia/dts/tegra20-seaboard.dts              |   10 +
>>  .../nand/nvidia,tegra20-nand.txt                   |   53 +
>>  drivers/mtd/nand/Makefile                          |    1 +
>>  drivers/mtd/nand/nand_base.c                       |    3 +-
>>  drivers/mtd/nand/tegra_nand.c                      | 1026
>> ++++++++++++++++++++
>>  drivers/mtd/nand/tegra_nand.h                      |  257 +++++
>>  include/configs/seaboard.h                         |    9 +
>>  include/configs/tegra20-common.h                   |    2 +
>>  include/fdtdec.h                                   |    1 +
>>  include/linux/mtd/nand.h                           |    7 +-
>>  lib/fdtdec.c                                       |    1 +
>>  15 files changed, 1384 insertions(+), 4 deletions(-)  create mode 100644
>> doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
>>  create mode 100644 drivers/mtd/nand/tegra_nand.c  create mode 100644
>> drivers/mtd/nand/tegra_nand.h
>>
>> --
>> 1.7.7.3
> --
> nvpublic


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