[U-Boot] [PATCH v2 09/11] fsl/mpc85xx: introduce fsl_print_rcw function
Valentin Longchamp
valentin.longchamp at keymile.com
Wed Aug 28 16:04:27 CEST 2013
The RCW gets printed on a lot of FSL 85xx devices and it is always done
the same way.
The fsl_print_rcw function performs this exact same task.
Signed-off-by: Valentin Longchamp <valentin.longchamp at keymile.com>
---
Changes in v2: None
arch/powerpc/cpu/mpc85xx/Makefile | 1 +
arch/powerpc/cpu/mpc85xx/fsl_corenet_rcw.c | 43 ++++++++++++++++++++++++++++++
arch/powerpc/include/asm/fsl_rcw.h | 19 +++++++++++++
board/freescale/b4860qds/b4860qds.c | 13 ++-------
board/freescale/corenet_ds/corenet_ds.c | 24 +++++++----------
board/freescale/t4qds/t4qds.c | 12 ++-------
6 files changed, 76 insertions(+), 36 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/fsl_corenet_rcw.c
create mode 100644 arch/powerpc/include/asm/fsl_rcw.h
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 4669883..8c51619 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -114,6 +114,7 @@ COBJS-$(CONFIG_QE) += qe_io.o
COBJS-$(CONFIG_CPM2) += serial_scc.o
COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
+COBJS-$(CONFIG_FSL_CORENET) += fsl_corenet_rcw.o
# SoC specific SERDES support
COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_rcw.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_rcw.c
new file mode 100644
index 0000000..ca3a566
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_rcw.c
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp at keymile.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_FSL_CORENET
+void fsl_print_rcw(void)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ unsigned int i;
+
+ puts("Reset Configuration Word (RCW):");
+ for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
+ u32 rcw = in_be32(&gur->rcwsr[i]);
+
+ if ((i % 4) == 0)
+ printf("\n %08x:", i * 4);
+ printf(" %08x", rcw);
+ }
+ puts("\n");
+}
+#endif
+
diff --git a/arch/powerpc/include/asm/fsl_rcw.h b/arch/powerpc/include/asm/fsl_rcw.h
new file mode 100644
index 0000000..077f176
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_rcw.h
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp at keymile.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef __ASM_PPC_FSL_RCW_H
+#define __ASM_PPC_FSL_RCW_H
+
+void fsl_print_rcw(void);
+
+#endif /* __ASM_PPC_FSL_RCW_H */
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index a39c17a..e9817c0 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -33,6 +33,7 @@
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
+#include <asm/fsl_rcw.h>
#include <fm_eth.h>
#include "../common/qixis.h"
@@ -51,8 +52,6 @@ int checkboard(void)
char buf[64];
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
- unsigned int i;
static const char *const freq[] = {"100", "125", "156.25", "161.13",
"122.88", "122.88", "122.88"};
int clock;
@@ -80,15 +79,7 @@ int checkboard(void)
/* Display the RCW, so that no one gets confused as to what RCW
* we're actually using for this boot.
*/
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
+ fsl_print_rcw();
/*
* Display the actual SERDES reference clocks as configured by the
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 48f7155..33e2aa5 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -32,6 +32,7 @@
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
+#include <asm/fsl_rcw.h>
#include <fm_eth.h>
#include "../common/ngpixis.h"
@@ -43,8 +44,6 @@ int checkboard (void)
{
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
- unsigned int i;
static const char * const freq[] = {"100", "125", "156.25", "212.5" };
printf("Board: %sDS, ", cpu->name);
@@ -66,15 +65,7 @@ int checkboard (void)
/* Display the RCW, so that no one gets confused as to what RCW
* we're actually using for this boot.
*/
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
+ fsl_print_rcw();
/* Display the actual SERDES reference clocks as configured by the
* dip switches on the board. Note that the SWx registers could
@@ -86,11 +77,14 @@ int checkboard (void)
puts("SERDES Reference Clocks: ");
#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) \
|| defined(CONFIG_P5040DS)
- sw = in_8(&PIXIS_SW(5));
- for (i = 0; i < 3; i++) {
- unsigned int clock = (sw >> (6 - (2 * i))) & 3;
+ {
+ unsigned int i;
+ sw = in_8(&PIXIS_SW(5));
+ for (i = 0; i < 3; i++) {
+ unsigned int clock = (sw >> (6 - (2 * i))) & 3;
- printf("Bank%u=%sMhz ", i+1, freq[clock]);
+ printf("Bank%u=%sMhz ", i+1, freq[clock]);
+ }
}
#ifdef CONFIG_P5040DS
/* On P5040DS, SW11[7:8] determines the Bank 4 frequency */
diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index f0f280b..3ec1509 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -33,6 +33,7 @@
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
+#include <asm/fsl_rcw.h>
#include <fm_eth.h>
#include "../common/qixis.h"
@@ -59,7 +60,6 @@ int checkboard(void)
char buf[64];
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
unsigned int i;
printf("Board: %sQDS, ", cpu->name);
@@ -87,15 +87,7 @@ int checkboard(void)
/* Display the RCW, so that no one gets confused as to what RCW
* we're actually using for this boot.
*/
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
+ fsl_print_rcw();
/*
* Display the actual SERDES reference clocks as configured by the
--
1.8.0.1
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