[U-Boot] [PATCH 6/6] mx6: soc: Disable VDDPU regulator

Fabio Estevam festevam at gmail.com
Thu Dec 26 18:00:50 CET 2013


On Tue, Dec 24, 2013 at 1:30 PM, Ranjani.Vaidyanathan at freescale.com
<Ranjani.Vaidyanathan at freescale.com> wrote:
> Hi Fabio,
>
> The PU power-up/power-down sequence has specific steps, includes some clock management. Please refer to the kernel code for the sequence.

Thanks for the review, Ranjani.

Just sent v2 that disables vddpu in the same way as in kernel.

Regards,

Fabio Estevam


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