[U-Boot] [PATCH] cfi_flash: Fix detection of 8-bit bus flash devices via address shift

[Wolfgang Denk]

Dear Stefan,

In message <51B2FD5A.4060702 at denx.de> you wrote:
> 
> Wolfgang, you remember that s few weeks ago a similar CFI patch resulted
> in breaking flash support for one TQ board. Which one was that? Could
> you please either test this patch on this board or let me know which
> board this was? Then I'll do the testing next week.

This was on a custom system based on the TQM8541 SoM (which has been
removed from mainline, to it is OOT, unfortunately).

This new patch does not work correctly either:

Before (without this patch):

	U-Boot 2013.04-00517-gb657f46 (Jun 10 2013 - 15:57:13)

	CPU:   8541E, Version: 1.1, (0x807a0011)
	Core:  E500, Version: 2.0, (0x80200020)
	Clock Configuration:
	       CPU0:1000 MHz, 
	       CCB:333.333 MHz,
	       DDR:166.667 MHz (333.333 MT/s data rate), LBC:41.667 MHz
	CPM:   333.333 MHz
	L1:    D-cache 32 kB enabled
	       I-cache 32 kB enabled
	Board: TQM8541, serial# TQM8541GC0AD39-EAQFBC.0112 11871127
	I2C:   ready
	DRAM:  256 MiB
	Flash: 256 MiB
	...

	=> fli

	Bank # 1: CFI conformant flash (32 x 16)  Size: 128 MB in 512 Sectors
	  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
	  Erase timeout: 16384 ms, write timeout: 2 ms
	  Buffer write timeout: 5 ms, buffer size: 32 bytes

	  Sector Start Addresses:
	  F0000000        F0040000        F0080000        F00C0000        F0100000      
	  F0140000 E      F0180000 E      F01C0000 E      F0200000 E      F0240000 E    
	  F0280000 E      F02C0000 E      F0300000 E      F0340000 E      F0380000 E    
	...
	  F7D00000 E      F7D40000 E      F7D80000 E      F7DC0000 E      F7E00000 E    
	  F7E40000 E      F7E80000 E      F7EC0000 E      F7F00000 E      F7F40000 E    
	  F7F80000 E      F7FC0000 E    

	Bank # 2: CFI conformant flash (32 x 16)  Size: 128 MB in 512 Sectors
	  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
	  Erase timeout: 16384 ms, write timeout: 2 ms
	  Buffer write timeout: 5 ms, buffer size: 32 bytes

	  Sector Start Addresses:
	  F8000000 E      F8040000 E      F8080000 E      F80C0000 E      F8100000 E    
	  F8140000 E      F8180000 E      F81C0000 E      F8200000 E      F8240000 E    
	  F8280000 E      F82C0000 E      F8300000 E      F8340000 E      F8380000 E    
	...
	  FFD00000 E      FFD40000 E      FFD80000 E      FFDC0000 E      FFE00000 E    
	  FFE40000 E      FFE80000 E      FFEC0000 E      FFF00000   RO   FFF40000   RO 
	  FFF80000   RO   FFFC0000   RO 
	=> 

After applying the patch:

	U-Boot 2013.04-00518-g6678bb9 (Jun 10 2013 - 15:52:12)

	CPU:   8541E, Version: 1.1, (0x807a0011)
	Core:  E500, Version: 2.0, (0x80200020)
	Clock Configuration:
	       CPU0:1000 MHz, 
	       CCB:333.333 MHz,
	       DDR:166.667 MHz (333.333 MT/s data rate), LBC:41.667 MHz
	CPM:   333.333 MHz
	L1:    D-cache 32 kB enabled
	       I-cache 32 kB enabled
	Board: TQM8541, serial# TQM8541GC0AD39-EAQFBC.0112 11871127
	I2C:   ready
	DRAM:  256 MiB
	Flash: 128 MiB
	...
	=> fli

	Bank # 1: CFI conformant flash (16 x 16)  Size: 64 MB in 512 Sectors
	  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
	  Erase timeout: 16384 ms, write timeout: 2 ms
	  Buffer write timeout: 5 ms, buffer size: 32 bytes

	  Sector Start Addresses:
	  F8000000        F8020000        F8040000        F8060000        F8080000      
	  F80A0000        F80C0000        F80E0000        F8100000        F8120000      
	  F8140000 E      F8160000 E      F8180000 E      F81A0000 E      F81C0000 E    
	...
	  FBE80000 E      FBEA0000 E      FBEC0000 E      FBEE0000 E      FBF00000 E    
	  FBF20000 E      FBF40000 E      FBF60000 E      FBF80000 E      FBFA0000 E    
	  FBFC0000 E      FBFE0000 E    

	Bank # 2: CFI conformant flash (16 x 16)  Size: 64 MB in 512 Sectors
	  AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301
	  Erase timeout: 16384 ms, write timeout: 2 ms
	  Buffer write timeout: 5 ms, buffer size: 32 bytes

	  Sector Start Addresses:
	  FC000000 E      FC020000 E      FC040000 E      FC060000 E      FC080000 E    
	  FC0A0000 E      FC0C0000 E      FC0E0000 E      FC100000 E      FC120000 E    
	  FC140000 E      FC160000 E      FC180000 E      FC1A0000 E      FC1C0000 E    
	  FFE80000 E      FFEA0000 E      FFEC0000 E      FFEE0000 E      FFF00000   RO 
	  FFF20000 E RO   FFF40000   RO   FFF60000 E RO   FFF80000   RO   FFFA0000   RO 
	  FFFC0000 E RO   FFFE0000   RO 
	=> 

I. e. it detects only half the correct flash size (due to detecting
the flash as 16 x 16 configuration, which is wrong - it is actually a
32 x 16 one with 2 x 16 bit devices in parallel).

In the result, accessing the flash does not work correctly, either:

	=> erase fff80000 +80000

	.... done
	Erased 4 sectors
	=> cp.b 100000 fff80000 80000
	Copy to Flash... Flash not Erased


So NAK to this patch from my side.

Best regards,

Wolfgang Denk

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