[U-Boot] [PATCH v2 14/22] x86: Add support for MTRRs

[Simon Glass]

On 1 January 2015 at 16:18, Simon Glass <sjg at chromium.org> wrote:
> Memory Type Range Registers are used to tell the CPU whether memory is
> cacheable and if so the cache write mode to use.
>
> Clean up the existing header file to follow style, and remove the unneeded
> code.
>
> These can speed up booting so should be supported. Add these to global_data
> so they can be requested while booting. We will apply the changes during
> relocation (in a later commit).
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v2: None
>
>  arch/x86/cpu/Makefile              |   1 +
>  arch/x86/cpu/coreboot/coreboot.c   |  22 +++---
>  arch/x86/cpu/ivybridge/car.S       |  12 +--
>  arch/x86/cpu/mtrr.c                |  81 +++++++++++++++++++
>  arch/x86/include/asm/global_data.h |  15 ++++
>  arch/x86/include/asm/mtrr.h        | 157 +++++++++++++++++--------------------
>  6 files changed, 187 insertions(+), 101 deletions(-)
>  create mode 100644 arch/x86/cpu/mtrr.c

Applied to u-boot-x86/next.