[U-Boot] [PATCH v3 0/12] Add support for caching Memory Reference Code data

Simon Glass sjg at chromium.org
Sat Jan 24 14:31:10 CET 2015


On 23 January 2015 at 20:56, Bin Meng <bmeng.cn at gmail.com> wrote:
> Hi Simon,
>
> On Sat, Jan 24, 2015 at 5:17 AM, Simon Glass <sjg at chromium.org> wrote:
>> Hi Bin,
>>
>> On 19 January 2015 at 22:16, Simon Glass <sjg at chromium.org> wrote:
>>> Since the memory reference code is so slow on x86, add a feature to bypass
>>> this, storing the previous parameters in SPI flash. This saves around 500ms
>>> on each boot.
>>>
>>> Also enable a SPI flash environment.
>>>
>>> Changes in v3:
>>> - Add new patch to move checksum to its own file in net/
>>> - Adjust net/ code to use the new checksum functions
>>> - Use checksum code that is now in net/checksum.c
>>> - Adjust functions to remain compatible with other RTC drivers
>>> - Drop accidental creation of link.dts due to bad rebase
>>> - Use checksum code from net/checksum.c
>>> - Add misc_init_r() call for link now that it is shared with chromebook_link
>>
>> I'd like to get this applied. Do you have any comments on the new
>> checksum approach?
>>
>
> I did not perform a thorough review to the new checksum thus did not
> offer a 'Reviewed-by', but generally it looks good to me. Please go
> ahead.

OK, going ahead, thanks.

I'll leave out the net/ patch until I get some word on that.


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