[U-Boot] [PATCH 1/2] Tegra: clocks: Add 38.4MHz OSC support for T210 use

Stephen Warren swarren at wwwdotorg.org
Thu Jul 30 20:41:23 CEST 2015


On 07/29/2015 02:13 PM, Tom Warren wrote:
> Added 38.4MHz/48MHz entries to pll_x_table for CPU PLL. Needs
> to be measured - should be close to 700MHz (1.4G/2).
>
> Note that some freqs aren't in the PLLU table in T210 TRM
> (13, 26MHz), so I used the 12MHz table entry for them. They
> shouldn't be selected since they're not viable T210 OSC freqs.
>
> Since there are now 2 new OSC defines, all tables (pll_x_table,
> PLLU) had to increase by two entries, but since 38.4/48MHz are
> not viable osc freqs on T20/30/114, etc, they're just set to 0.

I didn't look at all of the numbers in detail, but these patches look 
like a step in the right direction, so the series,
Acked-by: Stephen Warren <swarren at nvidia.com>
Tested-by: Stephen Warren <swarren at nvidia.com>
(tested upstream this time)


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