[U-Boot] [PATCH v2 7/7] dm: x86: baytrail: Correct PCI region 3 when driver model is used

[Bin Meng]

On Fri, Jun 26, 2015 at 1:55 AM, Simon Glass <sjg at chromium.org> wrote:
> Commit afbbd413a fixed this for non-driver-model. Make sure that the driver
> model code handles this also.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v2:
> - Only limit the PCI system memory region on x86 machines
>
>  arch/x86/cpu/cpu.c                | 1 +
>  common/board_f.c                  | 4 ++++
>  drivers/pci/pci-uclass.c          | 8 ++++++--
>  include/asm-generic/global_data.h | 1 +
>  4 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
> index d108ee5..936b6ee 100644
> --- a/arch/x86/cpu/cpu.c
> +++ b/arch/x86/cpu/cpu.c
> @@ -351,6 +351,7 @@ int x86_cpu_init_f(void)
>
>                 gd->arch.has_mtrr = has_mtrr();
>         }
> +       gd->pci_ram_top = 0x80000000U;
>
>         return 0;
>  }
> diff --git a/common/board_f.c b/common/board_f.c
> index 21be26f..cb85382 100644
> --- a/common/board_f.c
> +++ b/common/board_f.c
> @@ -350,6 +350,10 @@ static int setup_dest_addr(void)
>                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
>         }
>  #endif
> +#ifdef CONFIG_PCI
> +       gd->pci_ram_top = gd->ram_top;
> +#endif
> +
>         return 0;
>  }
>
> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> index edec93f..5b91fe3 100644
> --- a/drivers/pci/pci-uclass.c
> +++ b/drivers/pci/pci-uclass.c
> @@ -444,6 +444,7 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
>  {
>         int pci_addr_cells, addr_cells, size_cells;
>         int cells_per_record;
> +       phys_addr_t addr;
>         const u32 *prop;
>         int len;
>         int i;
> @@ -494,8 +495,11 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
>         }
>
>         /* Add a region for our local memory */
> -       pci_set_region(hose->regions + hose->region_count++, 0, 0,
> -                      gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
> +       addr = gd->ram_size;
> +       if (gd->pci_ram_top && gd->pci_ram_top < addr)
> +               addr = gd->pci_ram_top;
> +       pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
> +                      PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
>
>         return 0;
>  }
> diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
> index 6747619..db0550b 100644
> --- a/include/asm-generic/global_data.h
> +++ b/include/asm-generic/global_data.h
> @@ -93,6 +93,7 @@ typedef struct global_data {
>  #endif
>  #ifdef CONFIG_PCI
>         struct pci_controller *hose;    /* PCI hose for early use */
> +       phys_addr_t pci_ram_top;        /* top of region accessible to PCI */
>  #endif
>  #ifdef CONFIG_PCI_BOOTDELAY
>         int pcidelay_done;
> --

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>