[U-Boot] [PATCH 3/3] x86: Added support for Advantech SOM-6896

[George McCollister]

On Fri, Oct 9, 2015 at 10:31 PM, Bin Meng <bmeng.cn at gmail.com> wrote:
> Hi George,
>
> On Sat, Oct 10, 2015 at 5:54 AM, George McCollister
> <george.mccollister at gmail.com> wrote:
>> Advantech SOM-6896 is a Broadwell U based COM Express Compact Module
>> Type 6. This patch adds support for it as a coreboot payload.
>>
>> On board SATA and SPI are functional. On board Ethernet isn't functional
>> but since it's optional and ties up a PCIe x4 that is otherwise brought
>> out, this isn't a concern at the moment. USB doesn't work since the
>> xHCI driver appears to be broken.
>>
>> Signed-off-by: George McCollister <george.mccollister at gmail.com>
>> ---
>>  arch/x86/dts/Makefile      |  3 ++-
>>  arch/x86/dts/som-6896.dts  | 43 +++++++++++++++++++++++++++++++++++++++++++
>>  include/configs/som-6896.h | 38 ++++++++++++++++++++++++++++++++++++++
>>  3 files changed, 83 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/x86/dts/som-6896.dts
>>  create mode 100644 include/configs/som-6896.h
>>
>> diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
>> index 71595c7..9fa2e21 100644
>> --- a/arch/x86/dts/Makefile
>> +++ b/arch/x86/dts/Makefile
>> @@ -6,7 +6,8 @@ dtb-y += bayleybay.dtb \
>>         galileo.dtb \
>>         minnowmax.dtb \
>>         qemu-x86_i440fx.dtb \
>> -       qemu-x86_q35.dtb
>> +       qemu-x86_q35.dtb \
>> +       som-6896.dtb
>>
>>  targets += $(dtb-y)
>>
>> diff --git a/arch/x86/dts/som-6896.dts b/arch/x86/dts/som-6896.dts
>> new file mode 100644
>> index 0000000..ad904c9
>> --- /dev/null
>> +++ b/arch/x86/dts/som-6896.dts
>> @@ -0,0 +1,43 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +/include/ "serial.dtsi"
>> +/include/ "rtc.dtsi"
>> +
>> +/ {
>> +       model = "Advantech SOM-6896";
>> +       compatible = "advantech,som-6896", "intel,broadwell";
>> +
>> +       aliases {
>> +               spi0 = "/spi";
>> +       };
>> +
>> +       config {
>> +              silent_console = <0>;
>> +       };
>> +
>> +       chosen {
>> +               stdout-path = "/serial";
>> +       };
>> +
>> +       pci {
>> +               compatible = "intel,pci-broadwell", "pci-x86";
>
> I would just describe it as "pci-x86" as Intel chipset PCI is compatible.
Okay
>
>> +               #address-cells = <3>;
>> +               #size-cells = <2>;
>> +               u-boot,dm-pre-reloc;
>> +               ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
>
> Can you verify 0xe0000000 is not configured by coreboot as the PCIe
> ECAM base address?
I'll try to verify these, it's quite possible they are incorrect.
>
>> +                       0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
>> +                       0x01000000 0x0 0x1000 0x1000 0 0xefff>;
>> +       };
>> +
>> +       spi {
>> +               #address-cells = <1>;
>> +               #size-cells = <0>;
>> +               compatible = "intel,ich-spi";
>> +               spi-flash at 0 {
>> +                       reg = <0>;
>> +                       compatible = "winbond,w25q128", "spi-flash";
>> +                       memory-map = <0xff800000 0x00800000>;
>> +               };
>> +       };
>> +};
>> diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h
>> new file mode 100644
>> index 0000000..518bf11
>> --- /dev/null
>> +++ b/include/configs/som-6896.h
>> @@ -0,0 +1,38 @@
>> +/*
>> + * Configuration settings for the SOM-6896
>> + *
>> + * Copyright (C) 2015 NovaTech LLC
>> + *                   George McCollister <george.mccollister at gmail.com>
>> + *
>> + * SPDX-License-Identifier:    GPL-2.0+
>> + */
>> +
>> +#ifndef __CONFIG_H
>> +#define __CONFIG_H
>> +
>> +#include <configs/x86-common.h>
>> +
>> +#define CONFIG_SYS_MONITOR_LEN         (1 << 20)
>> +
>> +#define CONFIG_BOARD_EARLY_INIT_F
>> +#define CONFIG_MISC_INIT_R
>> +
>> +#define CONFIG_SCSI_DEV_LIST   \
>> +       {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
>> +
>> +#define CONFIG_SYS_EARLY_PCI_INIT
>> +#define CONFIG_PCI_PNP
>> +
>> +#define VIDEO_IO_OFFSET                        0
>> +#define CONFIG_X86EMU_RAW_IO
>> +
>> +#define CONFIG_ARCH_EARLY_INIT_R
>> +
>> +#define CONFIG_STD_DEVICES_SETTINGS     "stdin=serial,vga,usbkbd\0" \
>> +                                       "stdout=serial,vga\0" \
>> +                                       "stderr=serial,vga\0"
>> +
>> +#define CONFIG_ENV_SECT_SIZE           0x1000
>> +#define CONFIG_ENV_OFFSET              0x00ff0000
>
> This address looks odd to me. As in the dts file, the SPI flash is
> described as a 8MB chip, but here the offset is below 16MB, which is
> outside the flash address range.
Yeah it's a 16MB chip, I screwed that up, I'll fix it. Thanks for catching that.
>
>> +
>> +#endif /* __CONFIG_H */
>> --
>
> Regards,
> Bin