[U-Boot] [PATCH v2 32/55] x86: ivybridge: Use the SATA driver to do the init

Simon Glass sjg at chromium.org
Mon Jan 18 00:11:37 CET 2016


Instead of manually initing the device, probe the SATA device and move the
init there.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v2:
- Update to use the disk uclass

 arch/x86/cpu/ivybridge/bd82x6x.c              | 13 +++++--------
 arch/x86/cpu/ivybridge/sata.c                 |  4 +++-
 arch/x86/include/asm/arch-ivybridge/bd82x6x.h |  1 -
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index 1fe2ce1..188b7da 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -22,7 +22,7 @@ static int bd82x6x_probe(struct udevice *dev)
 {
 	const void *blob = gd->fdt_blob;
 	struct pci_controller *hose;
-	int sata_node, gma_node;
+	int gma_node;
 	int ret;
 
 	if (!(gd->flags & GD_FLG_RELOC))
@@ -31,13 +31,10 @@ static int bd82x6x_probe(struct udevice *dev)
 	hose = pci_bus_to_hose(0);
 	lpc_enable(PCH_LPC_DEV);
 	lpc_init_extra(hose, PCH_LPC_DEV);
-	sata_node = fdtdec_next_compatible(blob, 0,
-					   COMPAT_INTEL_PANTHERPOINT_AHCI);
-	if (sata_node < 0) {
-		debug("%s: Cannot find SATA node\n", __func__);
-		return -EINVAL;
-	}
-	bd82x6x_sata_init(PCH_SATA_DEV, blob, sata_node);
+
+	/* Cause the SATA device to do its init */
+	uclass_first_device(UCLASS_DISK, &dev);
+
 	bd82x6x_usb_ehci_init(PCH_EHCI1_DEV);
 	bd82x6x_usb_ehci_init(PCH_EHCI2_DEV);
 
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index c46ec3a..6314566 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -47,7 +47,7 @@ static void common_sata_init(pci_dev_t dev, unsigned int port_map)
 	x86_pci_write_config32(dev, 0x94, ((port_map ^ 0x3f) << 24) | 0x183);
 }
 
-void bd82x6x_sata_init(pci_dev_t dev, const void *blob, int node)
+static void bd82x6x_sata_init(pci_dev_t dev, const void *blob, int node)
 {
 	unsigned int port_map, speed_support, port_tx;
 	struct pci_controller *hose = pci_bus_to_hose(0);
@@ -232,6 +232,8 @@ static int bd82x6x_sata_probe(struct udevice *dev)
 {
 	if (!(gd->flags & GD_FLG_RELOC))
 		bd82x6x_sata_enable(PCH_SATA_DEV, gd->fdt_blob, dev->of_offset);
+	else
+		bd82x6x_sata_init(PCH_SATA_DEV, gd->fdt_blob, dev->of_offset);
 
 	return 0;
 }
diff --git a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
index 7a05c7e..bb3a6c9 100644
--- a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
+++ b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
@@ -7,7 +7,6 @@
 #ifndef _ASM_ARCH_BD82X6X_H
 #define _ASM_ARCH_BD82X6X_H
 
-void bd82x6x_sata_init(pci_dev_t dev, const void *blob, int node);
 void bd82x6x_usb_ehci_init(pci_dev_t dev);
 void bd82x6x_usb_xhci_init(pci_dev_t dev);
 int gma_func0_init(struct udevice *dev, const void *blob, int node);
-- 
2.6.0.rc2.230.g3dd15c0



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