[U-Boot] Newbie SPL question for socfpga_sockit

Dinh Nguyen dinguyen at opensource.altera.com
Tue Mar 22 18:06:09 CET 2016



On 03/20/2016 11:42 AM, Marek Vasut wrote:
>>
>> Sorry, I know that doesn't help. So let's walk through my workflow. I am
>> not using any Altera tools when I build.
>>
>> $make socfpga_de0_nano_soc_defconfig
>> $make u-boot-with-spl.sfp
>> $dd if=u-boot-with-spl.sfp of=/dev/sdb3
>>
>> My gcc is: arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.3-12ubuntu1) 4.7.3
>>
>> Has the board ever worked for you at all? Can you try this image:
>>
>> https://rocketboards.org/foswiki/view/Documentation/AtlasSoCSdCardImage
>>
>> Dinh
> 
> I just ported U-Boot to another customer board. I noticed QSPI has
> problems and USB can be flaky. That's the standard cache issue we
> have, disabling dcache fixed that.
> 
> I am starting to wonder whether we're hitting some corner case here.
> Maybe we should eventually try and trace all the register reads and
> writes generated by the DDR calibration code both in old and new SPL
> and make a diff to see if something really did change.
> 
> Dinh, can you share the marking on the SoC and the DRAMs on your board?
> 

My SoC is:

5CSEMA4U23C6N
CACAU1525A

DRAMs are:

ISSI 1510
IS43TR16256A
15HBL K080
P4482100QER2 TWN

Dinh



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