[U-Boot] [PATCH v2 6/6] ARMv8: LS1043A: Enable LS1043A default PSCI support

macro.wave.z at gmail.com macro.wave.z at gmail.com
Tue Nov 1 11:04:32 CET 2016


From: Hongbo Zhang <hongbo.zhang at nxp.com>

A most basic PSCI implementation with only one psci_version is added for
LS1043A, this can verify the generic PSCI framework, and more platform specific
implementation will be added later.

Signed-off-by: Hongbo Zhang <hongbo.zhang at nxp.com>
---
 arch/arm/cpu/armv8/Kconfig                       |  3 +++
 arch/arm/cpu/armv8/fsl-layerscape/Makefile       |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/ls1043a_psci.S | 20 ++++++++++++++++++++
 board/freescale/ls1043ardb/Kconfig               |  9 +++++++++
 configs/ls1043ardb_defconfig                     |  1 +
 5 files changed, 34 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1043a_psci.S

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 173950d..985bfca 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -51,6 +51,7 @@ config ARMV8_PSCI
 config ARMV8_PSCI_NR_CPUS
 	int "Maximum supported CPUs for PSCI"
 	depends on ARMV8_PSCI
+	default 4 if TARGET_LS1043ARDB
 	default 4
 	help
 	  The maximum number of CPUs supported in the PSCI firmware.
@@ -60,6 +61,7 @@ config ARMV8_PSCI_NR_CPUS
 config ARMV8_PSCI_CPUS_PER_CLUSTER
 	int "Number of CPUs per cluster"
 	depends on ARMV8_PSCI
+	default 4 if TARGET_LS1043ARDB
 	default 0
 	help
 	  The number of CPUs per cluster, suppose each cluster has same number
@@ -72,6 +74,7 @@ if SYS_HAS_ARMV8_SECURE_BASE
 config ARMV8_SECURE_BASE
 	hex "Secure address for PSCI image"
 	depends on ARMV8_PSCI
+	default 0x10010000 if TARGET_LS1043ARDB
 	help
 	  Address for placing the PSCI text, data and stack sections.
 	  If not defined, the PSCI sections are placed together with the u-boot
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 51c1cee..423b4b3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -28,6 +28,7 @@ endif
 
 ifneq ($(CONFIG_LS1043A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
+obj-$(CONFIG_ARMV8_PSCI) += ls1043a_psci.o
 endif
 
 ifneq ($(CONFIG_ARCH_LS1012A),)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_psci.S b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_psci.S
new file mode 100644
index 0000000..86045ac
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_psci.S
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ * Author: Hongbo Zhang <hongbo.zhang at nxp.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ * This file implements LS102X platform PSCI SYSTEM-SUSPEND function
+ */
+
+#include <config.h>
+#include <linux/linkage.h>
+#include <asm/psci.h>
+
+	.pushsection ._secure.text, "ax"
+
+.globl	psci_version
+psci_version:
+	ldr	w0, =0x00010000		/* PSCI v1.0 */
+	ret
+
+	.popsection
diff --git a/board/freescale/ls1043ardb/Kconfig b/board/freescale/ls1043ardb/Kconfig
index 51818ec..0c596f9 100644
--- a/board/freescale/ls1043ardb/Kconfig
+++ b/board/freescale/ls1043ardb/Kconfig
@@ -13,4 +13,13 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "ls1043ardb"
 
+config SYS_HAS_ARMV8_SECURE_BASE
+	bool "Enable secure RAM for PSCI image"
+	depends on ARMV8_PSCI
+	default y
+	help
+	  PSCI image can be re-located to secure RAM.
+	  If enabled, please also define the value for ARMV8_SECURE_BASE,
+	  for LS1043ARDB, it is address in OCRAM.
+
 endif
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 7d627af..4bfd0aa 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -27,3 +27,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_STORAGE=y
+CONFIG_ARMV8_PSCI=y
-- 
2.1.4



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