[U-Boot] [PATCH RESEND v2 2/2] spi: ti_qspi: Fix baudrate divider calculation

R, Vignesh vigneshr at ti.com
Sat Nov 5 11:36:50 CET 2016


[...]

On 11/4/2016 4:31 PM, Jagan Teki wrote:
>>> >> diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
>>> >> index 52520dff6325..b5de70bf40e3 100644
>>> >> --- a/drivers/spi/ti_qspi.c
>>> >> +++ b/drivers/spi/ti_qspi.c
>>> >> @@ -16,6 +16,7 @@
>>> >>  #include <asm/omap_gpio.h>
>>> >>  #include <asm/omap_common.h>
>>> >>  #include <asm/ti-common/ti-edma3.h>
>>> >> +#include <linux/kernel.h>
>>> >>
>>> >>  DECLARE_GLOBAL_DATA_PTR;
>>> >>
>>> >> @@ -118,21 +119,19 @@ static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz)
>>> >>         if (!hz)
>>> >>                 clk_div = 0;
>>> >>         else
>>> >> -               clk_div = (priv->fclk / hz) - 1;
>>> >> -
>>> >> -       debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div);
>>> >> +               clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1;
>>> >>
>>> >>         /* disable SCLK */
>>> >>         writel(readl(&priv->base->clk_ctrl) & ~QSPI_CLK_EN,
>>> >>                &priv->base->clk_ctrl);
>> >
>> > Move this before enable SCLK.

Ok...

> Do send the updated v3 or discusses further, I need to send the release PR?

Sorry for the delay.. Posted v3 with above change.

-- 
Regards
Vignesh


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