[U-Boot] [Pull request v2]: u-boot-spi/sunxi

Tom Rini trini at konsulko.com
Fri Nov 25 21:41:36 CET 2016


On Fri, Nov 25, 2016 at 07:42:02PM +0530, Jagan Teki wrote:
> On Fri, Nov 25, 2016 at 6:32 AM, Chen-Yu Tsai <wens at csie.org> wrote:
> > Hi,
> >
> > On Fri, Nov 25, 2016 at 3:00 AM, Jagan Teki <jagan at openedev.com> wrote:
> >> Hi Tom,
> >>
> >> These are the pending patches, from u-boot-sunxi/next.
> >>
> >> Will send sunxi PR on top of u-boot-sunxi repo once I get the access,
> >> meanwhile please take this PR.
> >>
> >> Hans, Let me know if I miss any patches from next.
> >>
> >> Changes for v2:
> >> - Dropped 3 patches, which are still in review.
> >>
> >> thanks!
> >> Jagan.
> >>
> >> The following changes since commit fc127d184aea293ec415dd66e3282dba0b66c5f3:
> >>
> >>   colibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reason (2016-11-23 13:53:20 +0100)
> >>
> >> are available in the git repository at:
> >>
> >>   git://git.denx.de/u-boot-spi.git sunxi
> >>
> >> for you to fetch changes up to 2e34089969b9443b969c3b209b73799df4451eb1:
> >>
> >>   mtd: nand: add support for the TC58NVG2S0H chip (2016-11-25 00:23:25 +0530)
> >>
> >> ----------------------------------------------------------------
> >> Boris Brezillon (1):
> >>       mtd: nand: add support for the TC58NVG2S0H chip
> >>
> >> Chen-Yu Tsai (9):
> >>       ARM: PSCI: Set ARMV7_PSCI_NR_CPUS default to 8 for sun9i/A80
> >>       sunxi: Add CCI-400 and CPUCFG registers base address for sun9i/A80
> >>       sunxi: Add base address of secure SRAM B for sun9i/A80
> >>       sunxi: Use secure SRAM B for secure RAM for sun9i/A80
> >>       sunxi: Add PRCM register definition for sun9i/A80
> >>       sunxi: Add CPUCFG register definitions for sun9i/A80
> >>       sunxi: Add support for TZPC on sun9i/A80
> >>       sunxi: Add basic PSCI implementation for A80
> >>       sunxi: Enable PSCI on sun9i/A80
> >
> > Can you drop the last enablement patch?
> >
> > The GIC setup is buggy at the moment. It will either respond to interrupts,
> > then return from exceptions in secure mode, or, if the GIC base address
> > is fixed, not return at all. :(
> >
> > This is something I'm still trying to wrap my head around.
> 
> OK, then as a matter of better review(something more) and look like
> these are related please work on all 9 patches.

And I'll wait for a v3 PR, thanks!

-- 
Tom
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