[U-Boot] [PATCH 04/11] ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h

[Masahiro Yamada]

This PHY might be used for other SoCs in the future.
Avoid including the SoC name in the header name.

Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---

 arch/arm/mach-uniphier/dram/{ddrphy-ld20-regs.h => ddruqphy-regs.h} | 6 +++---
 arch/arm/mach-uniphier/dram/umc-ld20.c                              | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)
 rename arch/arm/mach-uniphier/dram/{ddrphy-ld20-regs.h => ddruqphy-regs.h} (97%)

diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h b/arch/arm/mach-uniphier/dram/ddruqphy-regs.h
similarity index 97%
rename from arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
rename to arch/arm/mach-uniphier/dram/ddruqphy-regs.h
index 268ba7f..e496af5 100644
--- a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
+++ b/arch/arm/mach-uniphier/dram/ddruqphy-regs.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifndef _DDRPHY_LD20_REGS_H
-#define _DDRPHY_LD20_REGS_H
+#ifndef _DDRUQPHY_REGS_H
+#define _DDRUQPHY_REGS_H
 
 #include <linux/bitops.h>
 
@@ -76,4 +76,4 @@
 #define PHY_VREF_TRAINING		(0x72 << (PHY_REG_SHIFT))
 #define PHY_SCL_GATE_TIMING		(0x78 << (PHY_REG_SHIFT))
 
-#endif /* _DDRPHY_LD20_REGS_H */
+#endif /* _DDRUQPHY_REGS_H */
diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c
index ea933fe..b8c0f59 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld20.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld20.c
@@ -14,7 +14,7 @@
 #include <asm/processor.h>
 
 #include "../init.h"
-#include "ddrphy-ld20-regs.h"
+#include "ddruqphy-regs.h"
 #include "umc64-regs.h"
 
 #define DRAM_CH_NR	3
-- 
1.9.1