[U-Boot] [PATCH 1/7] rockchip: rk3399: update PPLL and pmu_pclk frequency

[Simon Glass]

Hi Kever,

On 29 August 2016 at 21:02, Kever Yang <kever.yang at rock-chips.com> wrote:
> This patch update PPLL to 676MHz and PMU_PCLK to 48MHz.

Why?

>
> Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> ---
>
>  arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> index c919f47..6776e48 100644
> --- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
> @@ -64,9 +64,9 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
>  #define APLL_HZ                (600*MHz)
>  #define GPLL_HZ                (594*MHz)
>  #define CPLL_HZ                (384*MHz)
> -#define PPLL_HZ                (594*MHz)
> +#define PPLL_HZ                (676*MHz)
>
> -#define PMU_PCLK_HZ    (99*MHz)
> +#define PMU_PCLK_HZ    (48*MHz)
>
>  #define ACLKM_CORE_HZ  (300*MHz)
>  #define ATCLK_CORE_HZ  (300*MHz)
> --
> 1.9.1
>

Regards,
Simon