[U-Boot] [PATCH] sunxi: set up PLL1 on sun6i+ without use dividers

[Maxime Ripard]

On Mon, Apr 10, 2017 at 04:43:00PM +0800, icenowy at aosc.io wrote:
> 在 2017-04-10 14:59，Maxime Ripard 写道：
> > On Mon, Apr 10, 2017 at 12:19:41AM +0800, Icenowy Zheng wrote:
> > > According to the researching result of Ondrej Jirman, the factor M of
> > > PLL1 shouldn't be used and the factor P should be used only if the
> > > intended frequency is lower than 288MHz. This is proven by the
> > > clk-sun8iw7_tbl.c in the BSP source code -- in there the M value is
> > > always 0 and the maximum frequency that P is not 0 is 224MHz.
> > > 
> > > As P is ignored on sun6i, it's not currently used. This patch removed
> > > the usage of M.
> > > 
> > > This patch is an original work by Ondrej Jirman, however, he didn't
> > > add
> > > a Signed-off-by tag here to his commit. So I take this code and
> > > added my
> > > Signed-off-by.
> > > 
> > > Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
> > > ---
> > > 
> > > This is a critical patch, and should be added to 2017.05.
> > > 
> > > It has been verified by the Armbian.
> > 
> > This doesn't mean anything. How has this been verified?
> 
> Armbian has included this patch since several months ago,
> and it's proven that without it DVFS will be not stable.
> (And it proved at least it won't make the system more
> unstable). See [1].

Then, this should have been your commit log.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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