[U-Boot] [PATCH] drivers: net: phy: atheros: apply the previous register setting for AR8031 to fix the voltage peak issue

[Sekhar Nori]

On Monday 06 February 2017 11:06 PM, Ken.Lin wrote:

>>> The register setting would turn out to be 0x3D47 on our project boards and
>> our signal measurement results show the patch (v2 version,
>> https://patchwork.ozlabs.org/patch/723461/)) could fix the voltage peak issue.
>>> The proposed solution is to follow the implementation in previous commits,
>> which include the reserved bits settings in SerDes Test and System Mode Control
>> register.

>> So what does the register setting turn out to be with my patch below ?
>>
>> What are the "previous commits" you refer to ?

Thanks for the references to the commits. You left out answering my 
question about what register settings you see with my patch.

I have included another patch now with some debug enabled. Can you 
apply this patch to latest u-boot master, run on your board and send me 
the log ? Here is what I see on AM335x EVM-SK:

U-Boot 2017.03-rc1-00058-g1216f9a0851f (Feb 07 2017 - 13:55:38 +0530)

CPU  : AM335X-GP rev 1.0
Model: TI AM335x EVM-SK
DRAM:  256 MiB
NAND:  0 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
reading uboot.env
ERROR: No USB device found

at ../drivers/usb/gadget/ether.c:2709/usb_ether_init()
Net:   ar8031_config: value read back 0x2c47, written: 0x2d47
eth0: ethernet at 4a100000
Hit any key to stop autoboot:  0 

Thanks,
Sekhar

---8<---
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index b34cdd3d87dc..5c0a36676ce9 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -28,12 +28,18 @@ static int ar8021_config(struct phy_device *phydev)
 
 static int ar8031_config(struct phy_device *phydev)
 {
+       int regval;
+
        if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
            phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
                phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
                          AR803x_DEBUG_REG_5);
+               regval = phy_read(phydev, MDIO_DEVAD_NONE,
+                                 AR803x_PHY_DEBUG_DATA_REG);
+               printf("%s: value read back 0x%x, written: 0x%x\n",
+                               __func__, regval, regval | AR803x_RGMII_TX_CLK_DLY);
                phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
-                         AR803x_RGMII_TX_CLK_DLY);
+                         regval | AR803x_RGMII_TX_CLK_DLY);
        }
 
        if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||