[U-Boot] [PATCH 10/20] arm: socfpga: add misc support for Arria 10

Marek Vasut marex at denx.de
Tue Mar 7 03:50:19 UTC 2017


On 03/06/2017 09:00 AM, Ley Foon Tan wrote:
> On Sab, 2017-02-25 at 22:40 +0100, Marek Vasut wrote:
>> On 02/22/2017 10:47 AM, Ley Foon Tan wrote:
>>>
>>> Add misc support for Arria 10 and minor fix on misc Gen5.
>>>
>>> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
>>> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
>>> ---
>>>  arch/arm/mach-socfpga/Makefile            |   1 +
>>>  arch/arm/mach-socfpga/include/mach/misc.h |   6 +
>>>  arch/arm/mach-socfpga/misc_arria10.c      | 262
>>> ++++++++++++++++++++++++++++++
>>>  arch/arm/mach-socfpga/misc_gen5.c         |   3 +-
>>>  4 files changed, 271 insertions(+), 1 deletion(-)
>>>  create mode 100644 arch/arm/mach-socfpga/misc_arria10.c
>> [...]
>>
>>>
>>> +/*
>>> + * This function looking the 1st encounter UART peripheral,
>>> + * and then return its offset of the dedicated/shared IO pin
>>> + * mux. offset value (zero and above).
>>> + */
>>> +static int find_peripheral_uart(const void *blob,
>>> +	int child, const char *node_name)
>>> +{
>>> +	int len;
>>> +	fdt_addr_t base_addr = 0;
>>> +	fdt_size_t size;
>>> +	const u32 *cell;
>>> +	u32 value, offset = 0;
>>> +
>>> +	base_addr = fdtdec_get_addr_size(blob, child, "reg",
>>> &size);
>>> +	if (base_addr != FDT_ADDR_T_NONE) {
>>> +		cell = fdt_getprop(blob, child, "pinctrl-
>>> single,pins",
>>> +			&len);
>>> +		if (cell != NULL) {
>>> +			for (; len > 0; len -= (2 * sizeof(u32)))
>>> {
>> len == 0 is not handled ?
> If len is 0, it should go to return -1 below.

Ah, true. Brainfart, please ignore.

> BTW, I will change the -1 below to -EINVAL.

OK

>>>
>>> +				offset = fdt32_to_cpu(*cell++);
>>> +				value = fdt32_to_cpu(*cell++);
>>> +				/* Found UART peripheral */
>>> +				if (0x0D == value)
>>> +					return offset;
>>> +			}
>>> +		}
>>> +	}
>>> +	return -1;
>>> +}

[...]



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