[U-Boot] [PATCH 2/2] usb: xhci-dwc3: Enable USB3 PHY when available

Vignesh R vigneshr at ti.com
Mon Mar 5 11:27:11 UTC 2018


DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
USB2 PHY, to be functional. Therefore enable USB3 PHY when available.

Signed-off-by: Vignesh R <vigneshr at ti.com>
---
 drivers/usb/host/xhci-dwc3.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index cf1986bebd07..e7bc0bc35a86 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct xhci_dwc3_platdata {
 	struct phy usb_phy;
+	struct phy usb3_phy;
 };
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
@@ -145,6 +146,26 @@ static int xhci_dwc3_probe(struct udevice *dev)
 		}
 	}
 
+	ret = generic_phy_get_by_index(dev, 1, &plat->usb3_phy);
+	if (ret) {
+		if (ret != -ENOENT) {
+			pr_err("Failed to get USB3 PHY for %s\n", dev->name);
+			return ret;
+		}
+	} else {
+		ret = generic_phy_init(&plat->usb3_phy);
+		if (ret) {
+			pr_err("Can't init USB3 PHY for %s\n", dev->name);
+			return ret;
+		}
+
+		ret = generic_phy_power_on(&plat->usb3_phy);
+		if (ret) {
+			pr_err("Can't power on USB3 PHY for %s\n", dev->name);
+			return ret;
+		}
+	}
+
 	dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
 
 	dwc3_core_init(dwc3_reg);
@@ -178,6 +199,20 @@ static int xhci_dwc3_remove(struct udevice *dev)
 		}
 	}
 
+	if (generic_phy_valid(&plat->usb3_phy)) {
+		ret = generic_phy_power_off(&plat->usb3_phy);
+		if (ret) {
+			pr_err("Can't poweroff USB3 PHY for %s\n", dev->name);
+			return ret;
+		}
+
+		ret = generic_phy_exit(&plat->usb3_phy);
+		if (ret) {
+			pr_err("Can't deinit USB3 PHY for %s\n", dev->name);
+			return ret;
+		}
+	}
+
 	return xhci_deregister(dev);
 }
 
-- 
2.16.2



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