[U-Boot] [PATCH v2 2/3] mach-imx: bootaux: add dcache flushing before enabling M4

[Oleksandr Suvorov]

On Thu, Nov 28, 2019 at 3:57 PM Igor Opaniuk <igor.opaniuk at gmail.com> wrote:
>
> From: Igor Opaniuk <igor.opaniuk at toradex.com>
>
> This patch fixes the issue with broken bootaux command,
> when M4 binary is loaded and data cache isn't flushed
> before M4 core is enabled.
>
> Reproducing:
> > tftpboot ${loadaddr} ${board_name}/hello_world.bin
> > cp.b ${loadaddr} 0x7F8000 $filesize
> > bootaux 0x7F8000
>
> Signed-off-by: Igor Opaniuk <igor.opaniuk at toradex.com>

Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov at toradex.com>

> ---
>
>  arch/arm/mach-imx/imx_bootaux.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
> index ee786f7d06..c750cee60c 100644
> --- a/arch/arm/mach-imx/imx_bootaux.c
> +++ b/arch/arm/mach-imx/imx_bootaux.c
> @@ -27,6 +27,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
>         writel(stack, M4_BOOTROM_BASE_ADDR);
>         writel(pc, M4_BOOTROM_BASE_ADDR + 4);
>
> +       flush_dcache_all();
> +
>         /* Enable M4 */
>  #ifdef CONFIG_IMX8M
>         call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0);
> --
> 2.17.1
>
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-- 
Best regards
Oleksandr Suvorov

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