[U-Boot] [PATCH 2/3] pcie: designware: mvebu: fix reset release polarity

[Baruch Siach]

The dm_gpio_set_value() routine sets signal logical level, with
GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1
(asserted), while reset inactive value is 0 (de-asserted). Fix the reset
toggle code to set the correct reset logic value.

Reported-by: Sven Auhagen <sven.auhagen at voleatech.de>
Signed-off-by: Baruch Siach <baruch at tkos.co.il>
---
 drivers/pci/pcie_dw_mvebu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index 8081005c27ee..95fb41966fd6 100644
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -489,7 +489,9 @@ static int pcie_dw_mvebu_probe(struct udevice *dev)
 	 * using this GPIO.
 	 */
 	if (dm_gpio_is_valid(&reset_gpio)) {
-		dm_gpio_set_value(&reset_gpio, 1);
+		dm_gpio_set_value(&reset_gpio, 1); /* assert */
+		mdelay(200);
+		dm_gpio_set_value(&reset_gpio, 0); /* de-assert */
 		mdelay(200);
 	}
 #else
-- 
2.20.1