[PATCH v3 02/15] arm: cpu: armv8: add L3 memory flush support

Simon Glass sjg at chromium.org
Wed Jun 17 05:11:55 CEST 2020


On Wed, 10 Jun 2020 at 04:41, Rayagonda Kokatanur
<rayagonda.kokatanur at broadcom.com> wrote:
>
> Add L3 memory flush support for NS3.
>
> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
> ---
>  arch/arm/cpu/armv8/Makefile          |  1 +
>  arch/arm/cpu/armv8/bcmns3/Makefile   |  5 ++
>  arch/arm/cpu/armv8/bcmns3/lowlevel.S | 90 ++++++++++++++++++++++++++++
>  3 files changed, 96 insertions(+)
>  create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile
>  create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S
>
> diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
> index 2e48df0eb9..7e33a183d5 100644
> --- a/arch/arm/cpu/armv8/Makefile
> +++ b/arch/arm/cpu/armv8/Makefile
> @@ -39,3 +39,4 @@ obj-$(CONFIG_S32V234) += s32v234/
>  obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
>  obj-$(CONFIG_ARMV8_PSCI) += psci.o
>  obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o
> +obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/
> diff --git a/arch/arm/cpu/armv8/bcmns3/Makefile b/arch/arm/cpu/armv8/bcmns3/Makefile
> new file mode 100644
> index 0000000000..a35e29d11a
> --- /dev/null
> +++ b/arch/arm/cpu/armv8/bcmns3/Makefile
> @@ -0,0 +1,5 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright 2020 Broadcom.
> +
> +obj-y  += lowlevel.o
> diff --git a/arch/arm/cpu/armv8/bcmns3/lowlevel.S b/arch/arm/cpu/armv8/bcmns3/lowlevel.S
> new file mode 100644
> index 0000000000..202286248e
> --- /dev/null
> +++ b/arch/arm/cpu/armv8/bcmns3/lowlevel.S
> @@ -0,0 +1,90 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2020 Broadcom
> + *
> + * Extracted from fsl-layerscape/lowlevel.S

Should this file be common, then? Is the (c) correct?


More information about the U-Boot mailing list