[PATCH v2 4/6] net: sun8i-emac: add v3s variant

Ramon Fried rfried.dev at gmail.com
Tue May 25 08:53:35 CEST 2021


On Sun, May 23, 2021 at 2:23 AM Andreas Rehn <rehn.andreas86 at gmail.com> wrote:
>
> Add variant V3S_EMAC.
> Handle pinmux compile time error by skipping goio setup, because
> V3s uses internal phy and don't expose pins.
>
> Signed-off-by: Andreas Rehn <rehn.andreas86 at gmail.com>
> ---
> Changes in v2:
>         - skip pinmux and add proper description
>         - Add V3S variant add it to compatible list
>         - Skip (R)GMII flags and handle sun8i_handle_internal_phy
>
>  drivers/net/sun8i_emac.c | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
> index 5a1b38bf80..ab9f61994c 100644
> --- a/drivers/net/sun8i_emac.c
> +++ b/drivers/net/sun8i_emac.c
> @@ -145,6 +145,7 @@ enum emac_variant {
>         A64_EMAC,
>         R40_GMAC,
>         H6_EMAC,
> +       V3S_EMAC,
>  };
>
>  struct emac_dma_desc {
> @@ -303,7 +304,7 @@ static void sun8i_adjust_link(struct emac_eth_dev *priv,
>  static u32 sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 reg)
>  {
>         if (priv->use_internal_phy) {
> -               /* H3 based SoC's that has an Internal 100MBit PHY
> +               /* H3 and V3s based SoC's that has an Internal 100MBit PHY
>                  * needs to be configured and powered up before use
>                 */
>                 reg &= ~H3_EPHY_DEFAULT_MASK;
> @@ -354,7 +355,8 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
>         case PHY_INTERFACE_MODE_RGMII_ID:
>         case PHY_INTERFACE_MODE_RGMII_RXID:
>         case PHY_INTERFACE_MODE_RGMII_TXID:
> -               reg |= SC_EPIT | SC_ETCS_INT_GMII;
> +               if (priv->variant != V3S_EMAC)
> +                       reg |= SC_EPIT | SC_ETCS_INT_GMII;
>                 break;
>         case PHY_INTERFACE_MODE_RMII:
>                 if (priv->variant == H3_EMAC ||
> @@ -566,6 +568,10 @@ static int parse_phy_pins(struct udevice *dev)
>                 iomux = SUN8I_IOMUX;
>         else if (IS_ENABLED(CONFIG_MACH_SUN50I))
>                 iomux = SUN8I_IOMUX;
> +       else if (IS_ENABLED(CONFIG_MACH_SUN8I_V3S))
> +               // V3s does not expose any MAC pins,
> +               // but case is required to handle BUILD_BUG_ON_MSG.
> +               return 0;
>         else
>                 BUILD_BUG_ON_MSG(1, "missing pinmux value for Ethernet pins");
>
> @@ -956,7 +962,8 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
>                 return -EINVAL;
>         }
>
> -       if (priv->variant == H3_EMAC) {
> +       if (priv->variant == H3_EMAC ||
> +           priv->variant == V3S_EMAC) {
>                 ret = sun8i_handle_internal_phy(dev, priv);
>                 if (ret)
>                         return ret;
> @@ -1009,6 +1016,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
>                 .data = (uintptr_t)R40_GMAC },
>         {.compatible = "allwinner,sun50i-h6-emac",
>                 .data = (uintptr_t)H6_EMAC },
> +       {.compatible = "allwinner,sun8i-v3s-emac",
> +               .data = (uintptr_t)V3S_EMAC },
>         { }
>  };
>
> --
> 2.25.1
>
Reviewed-by: Ramon Fried <rfried.dev at gmail.com >


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