[PATCH v1 3/3] rockchip: rk3568: add arch_cpu_init()

[Kever Yang]

On 2021/10/8 上午10:21, Nico Cheng wrote:
> We configured the drive strength and security of EMMC in

typo: drive/driver.

EMMC and sdmmc

> arch_cpu_init().
>
> Signed-off-by: Nico Cheng <nico.cheng at rock-chips.com>
> ---
>
>   arch/arm/mach-rockchip/rk3568/rk3568.c | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
> index 973b4f9dcb..3f9a435c3c 100644
> --- a/arch/arm/mach-rockchip/rk3568/rk3568.c
> +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
> @@ -13,6 +13,14 @@
>   
>   #define PMUGRF_BASE		0xfdc20000
>   #define GRF_BASE		0xfdc60000
> +#define GRF_GPIO1B_DS_2		0x218
> +#define GRF_GPIO1B_DS_3		0x21c
> +#define GRF_GPIO1C_DS_0		0x220
> +#define GRF_GPIO1C_DS_1		0x224
> +#define GRF_GPIO1C_DS_2		0x228
> +#define GRF_GPIO1C_DS_3		0x22c
> +#define SGRF_BASE		0xFDD18000
> +#define SGRF_SOC_CON4		0x10
>   
>   /* PMU_GRF_GPIO0D_IOMUX_L */
>   enum {
> @@ -81,5 +89,16 @@ void board_debug_uart_init(void)
>   
>   int arch_cpu_init(void)
>   {
> +#ifdef CONFIG_SPL_BUILD
> +	/* Set the emmc sdmmc0 to secure */
> +	writel(((0x3 << 11 | 0x1 << 4) << 16), SGRF_BASE + SGRF_SOC_CON4);
Please use rk_clrreg to clr the reg.
> +	/* set the emmc ds to level 2 */

Please use driver strength instead of 'ds'.

Thanks,

- Kever

> +	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_2);
> +	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_3);
> +	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_0);
> +	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
> +	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
> +	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
> +#endif
>   	return 0;
>   }