[u-boot][PATCH v3 1/4] dm: memory: Introduce new uclass

Roger Quadros rogerq at kernel.org
Thu Oct 20 15:30:46 CEST 2022


Introduce UCLASS_MEMORY for future Memory Controller
device drivers.

Signed-off-by: Roger Quadros <rogerq at kernel.org>
Reviewed-by: Simon Glass <sjg at chromium.org>
---
 arch/sandbox/dts/test.dts       |  4 ++++
 drivers/memory/Kconfig          | 17 +++++++++++++++++
 drivers/memory/Makefile         |  2 ++
 drivers/memory/memory-sandbox.c | 18 ++++++++++++++++++
 drivers/memory/memory-uclass.c  | 13 +++++++++++++
 include/dm/uclass-id.h          |  1 +
 test/dm/Makefile                |  1 +
 test/dm/memory.c                | 21 +++++++++++++++++++++
 8 files changed, 77 insertions(+)
 create mode 100644 drivers/memory/memory-sandbox.c
 create mode 100644 drivers/memory/memory-uclass.c
 create mode 100644 test/dm/memory.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 2761588f0d..d65b2d2dcb 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -926,6 +926,10 @@
 		};
 	};
 
+	memory-controller {
+		compatible = "sandbox,memory";
+	};
+
 	misc-test {
 		#address-cells = <1>;
 		#size-cells = <1>;
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 7271892763..c621f5bba3 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -4,6 +4,23 @@
 
 menu "Memory Controller drivers"
 
+config MEMORY
+	bool "Enable Driver Model for Memory Controller drivers"
+	depends on DM
+	help
+	  Enable driver model for Memory Controller devices.
+	  These devices provide Memory bus interface to various devices like
+	  SRAM, Ethernet adapters, FPGAs, etc.
+	  For now this uclass has no methods yet.
+
+config SANDBOX_MEMORY
+	bool "Enable Sandbox Memory Controller driver"
+	depends on SANDBOX && MEMORY
+	help
+	  This is a driver model based Memory Controller driver for sandbox.
+	  Currently it is a stub only, as there are no usable uclass methods
+	  yet.
+
 config STM32_FMC2_EBI
 	bool "Support for FMC2 External Bus Interface on STM32MP SoCs"
 	depends on ARCH_STM32MP
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index fec52efb60..b27f701865 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -1,3 +1,5 @@
 
+obj-$(CONFIG_MEMORY) += memory-uclass.o
+obj-$(CONFIG_SANDBOX_MEMORY) += memory-sandbox.o
 obj-$(CONFIG_STM32_FMC2_EBI) += stm32-fmc2-ebi.o
 obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
diff --git a/drivers/memory/memory-sandbox.c b/drivers/memory/memory-sandbox.c
new file mode 100644
index 0000000000..f2ede50863
--- /dev/null
+++ b/drivers/memory/memory-sandbox.c
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022
+ *     Texas Instruments Incorporated, <www.ti.com>
+ */
+
+#include <dm.h>
+
+static const struct udevice_id sandbox_memory_match[] = {
+	{ .compatible = "sandbox,memory" },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(sandbox_memory) = {
+	.name	= "sandbox_memory",
+	.id	= UCLASS_MEMORY,
+	.of_match = sandbox_memory_match,
+};
diff --git a/drivers/memory/memory-uclass.c b/drivers/memory/memory-uclass.c
new file mode 100644
index 0000000000..d6d37fe777
--- /dev/null
+++ b/drivers/memory/memory-uclass.c
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022
+ *     Texas Instruments Incorporated, <www.ti.com>
+ */
+
+#include <dm.h>
+
+UCLASS_DRIVER(memory) = {
+	.name = "memory",
+	.id = UCLASS_MEMORY,
+	.post_bind = dm_scan_fdt_dev,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index a432e43871..936a16c5d9 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -76,6 +76,7 @@ enum uclass_id {
 	UCLASS_MASS_STORAGE,	/* Mass storage device */
 	UCLASS_MDIO,		/* MDIO bus */
 	UCLASS_MDIO_MUX,	/* MDIO MUX/switch */
+	UCLASS_MEMORY,		/* Memory Controller device */
 	UCLASS_MISC,		/* Miscellaneous device */
 	UCLASS_MMC,		/* SD / MMC card or chip */
 	UCLASS_MOD_EXP,		/* RSA Mod Exp device */
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 7543df8823..1082e65c41 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -47,6 +47,7 @@ ifneq ($(CONFIG_EFI_PARTITION),)
 obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o
 endif
 obj-$(CONFIG_FIRMWARE) += firmware.o
+obj-$(CONFIG_MEMORY) += memory.o
 obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o
 obj-$(CONFIG_DM_I2C) += i2c.o
 obj-$(CONFIG_SOUND) += i2s.o
diff --git a/test/dm/memory.c b/test/dm/memory.c
new file mode 100644
index 0000000000..7d9500aa91
--- /dev/null
+++ b/test/dm/memory.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022
+ *     Texas Instruments Incorporated, <www.ti.com>
+ */
+
+#include <dm.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
+
+static int dm_test_memory(struct unit_test_state *uts)
+{
+	struct udevice *dev;
+
+	ut_assertok(uclass_first_device_err(UCLASS_MEMORY, &dev));
+
+	return 0;
+}
+
+DM_TEST(dm_test_memory, UT_TESTF_SCAN_FDT);
-- 
2.17.1



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